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Title: On-Line Data-Acquisition Systems in Nuclear Physics, 1969
Author: Council, National Research, Fulbright, H. W., al.
Language: English
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                             _On-Line
                      Data-Acquisition Systems
                                in
                       Nuclear Physics, 1969_


        Ad Hoc Panel on On-Line Computers in Nuclear Research
                     Committee on Nuclear Science
                       National Research Council



                     _NATIONAL ACADEMY OF SCIENCES
                     Washington, D.C.        1970_



  This is a report of work under Contract
  NSF-C310, T.O. 47 between the National
  Science Foundation and the National
  Academy of Sciences and under Contract
  AT(49-1)3236 between the U.S. Atomic
  Energy Commission and the National
  Academy of Sciences.


  _Available from_

  Committee on Nuclear Science
  2101 Constitution Avenue
  Washington, D.C. 20418



PREFACE


The first digital electronic device employed to collect nuclear data
was the binary electronic counter (scaler) of the 1930's. In the next
decade single and multichannel pulse-height analyzers appeared, still
using vacuum tubes. In the 1950's the development of multichannel
analyzers continued vigorously, with vast improvement of the
analog-to-digital converter sections and with the introduction of
computer-type memories, based first on acoustic delay lines and a
short time later on ferrite cores. The replacement of vacuum tubes by
transistors beginning in the latter half of the 1950's accelerated
the pace of development and application of all types of electronic
laboratory instruments.

The 1960's was the decade of the computer. Before the 1960's almost
no on-line computers were used in nuclear research, but since about
1962 the computer has moved into the nuclear laboratory. It provides
the research worker with an immensely flexible, powerful, and
accurate tool capable of raising the research output of a laboratory
while eliminating the most tedious part of the experimental work.

The phenomenal speed of development of computer hardware, software,
and methodology contributes to the difficulty experienced by
everybody involved in decision-making processes regarding
data-acquisition systems. Since the cost of a computer system is
often a sizable fraction of the total cost of a new laboratory, there
is urgent need for a set of guiding rules or principles for use by a
laboratory director planning a system, a reviewer going over a
proposal for support, or a potential funding agency considering
proposals and reviews. The purpose of this report is to assist in
filling this need. The material presented is current through 1969.
Although we deal with a field that is developing rapidly, we hope
that a substantial portion of the material covered will have
long-lasting value.

Nuclear Research of the Committee on Nuclear Science, National
Research Council. Appointed in March 1968, the Panel first met in
Washington, D.C., on April 22, 1968.

The original members of the Panel were H. W. Fulbright, H. L.
Gelernter, L. J. Lidofsky, D. Ophir (through late 1968), L. B.
Robinson, and M. W. Sachs. In June 1968, this group prepared an
interim report. L. J. Lidofsky was on sabbatical leave in Europe and
therefore could not participate during the academic year 1968-1969.
Early in 1969 J. F. Mollenauer and J. Hahn joined the Panel.

The Panel has reviewed the present state of the field and has
attempted to anticipate future needs. We have agreed on many
important matters, including especially useful design features for
computers employed in data acquisition, as well as types of
organization of data-acquisition systems suitable for various
purposes, types of software that manufacturers should supply, and
approximate costs of systems, and we present a number of
recommendations in these areas. However, the Panel makes no
recommendation on standards for computer hardware, such as logic
levels and polarities, because of a conviction that these are now
rapidly being established as a result of sound engineering progress
and the pressure of economic competition in the fast-moving computer
business.

Throughout this report we have expressed opinions based on our own
experience and on the best information at our disposal. The nature of
the report seemed to demand some discussion of properties of specific
computers by name. We have tried to be neither misleading nor unjust
in our evaluations.

We wish to thank everyone who has aided us, especially P. W.
McDaniel, C. V. Smith, and G. Rogosa of the U.S. Atomic Energy
Commission and the many scientists in AEC-and NSF-sponsored
laboratories who supplied the basic data on which the economic survey
chapter is based. We are indebted to several members of the staff of
the Department of Physics and Astronomy of the University of
Rochester for assistance in the preparation of the manuscript,
especially Mrs. Brignall and Mrs. Hughes. We also received initial
directions and many helpful suggestions from D. A. Bromley, Chairman
of the Committee on Nuclear Science, F. S. Goulding, Chairman of the
Subcommittee on Instrumentation and Methods, W. S. Rodney and P.
Donovan of the National Science Foundation, and Charles K. Reed,
Executive Secretary of the Committee on Nuclear Science.

                         H. W. Fulbright,   _Chairman_
                         H. L. Gelernter    J. F. Mollenauer
                         J. Hahn            L. B. Robinson
                         L. J. Lidofsky     M. W. Sachs



CONTENTS


  1. THE TASKS AND THE COMPUTER                            1
      A. Introduction                                      1
      B. The Tasks                                         2
      C. The Computers                                     3
      D. Matching Computers to Tasks                       5
      E. On Characteristic Features of Computers and
         Related Equipment                                 6


  2. DATA-ACQUISITION SYSTEMS                             16
      A. Introduction                                     16
      B. A Small Time-Shared Data-Acquisition
         System Based on a PDP-7 Computer                 19
      C. A Small System Based on a PDP-8 Computer         23
      D. A Medium-Sized On-Line Computer System           28
      E. A Large System Based on a Single Computer
         (The Yale-IBM Nuclear-Data-Acquisition
         System)                                          32
      F. Multiple-Computer Systems                        39
      G. A Process-Control System: The Brookhaven
         Multiple Spectrometer Control System             48
      H. Relationship to a Remote Computing Center        54


  3. A REVIEW AND ANALYSIS OF EXPENDITURES                58
      A. The Nature of the Data                           58
      B. Breakdown of Data for Analysis                   59
      C. Types of Computers                               61
      D. Some Total Costs                                 61
      E. Breakdown of Costs by Systems                    64
      F. Rotating Memory Devices                          65
      G. Systems On-Line with Computing Centers           65
      H. Anticipated Future Expenditures                  65
      I. Investment in Accelerators, Computer
         Systems, and Laboratory Budgets                  66
      J. Process-Control Application                      67


  4. SUMMARY AND RECOMMENDATIONS ON SYSTEM PLANNING       68
      A. The Need for On-Line Computer Systems            68
      B. Where Should Large-Scale Calculations
         Be Done?                                         69
      C. Exercising Economic Judgment in Planning         70
      D. On the Utility of Small and Medium-Sized
         Computers                                        71
      E. Growth Considerations                            71
      F. Short Summary of Conclusions Regarding
         System Planning                                  73


  Appendix A: TABLES OF PROPERTIES OF SMALL AND
              MEDIUM-SIZED COMPUTERS                      79


  Appendix B: BACKGROUND INFORMATION FOR CHAPTER 3,
              A REVIEW AND ANALYSIS OF EXPENDITURES       86



Chapter 1

THE TASKS AND THE COMPUTERS


A. INTRODUCTION

On-line data-acquisition computer systems are made in a wide range of
types and sizes. In all cases at least one electronic computer is
involved--a stored-program machine--because wired-program devices
such as pulse-height analyzers are not considered to be computers.
The rest of the system typically consists of input/output (I/O)
devices such as analog-to-digital converters (ADC's), printers,
cathode-ray oscilloscopes, plotters, and control devices, which may
include, in addition to the console typewriter, switch boxes to
simplify the control of special types of operations and perhaps a set
of logic circuits associated with the input system, used to provide
preliminary selection of incoming data. In a small but increasing
number of cases a computer is seen dedicated entirely to a
"process-control" application such as the automatic adjustment of the
shim coils of a variable-energy cyclotron or the control of data
acquisition in a nuclear-scattering experiment, adjustments such as
changing the angle of observation being made essentially under direct
automatic control of the computer. The smallest on-line systems use
the smallest commercially available computers; the largest use
computers bigger than those which until recently served most
computing centers. Large systems sometimes include one or more
satellite computers. The cost of individual systems ranges from
$25,000 to $1,000,000, approximately. The total cost of computer
systems in low-energy nuclear laboratories is estimated by now to
have reached about $20,000,000. (There has been a larger expenditure
in the high-energy nuclear field, where computer systems have been
employed extensively for some years longer and where experiments are
so expensive that the economic advantages of computer use were
quickly recognized.)


B. THE TASKS

We first list the main uses to which on-line computer systems have
been put. We start with the simple operations, which we call Class 1.


_Class 1 operations_:

a. Accepting digital data from external devices and storing it in
computer memory.

b. Preliminary processing of incoming data, on-line, before storage.
This usually involves only operations of logic and simple arithmetic.

c. Controlling the presentation of data via cathode-ray oscilloscope
or typewriter, often for the purpose of monitoring the progress of an
experiment.

d. Controlling the recording of digital data on magnetic tape, paper
tape, or other storage medium.

e. Controlling an incremental plotter.

f. Controlling the output of large quantities of data via a line
printer.

g. Transmission of quantities of data between two computers or
between a computer and a pulse-height analyzer or other device having
a magnetic core memory.

       *       *       *       *       *

Several operations of intermediate complexity we will label Class 2.


_Class 2 operations_:

a. Processing of data already accumulated and stored either in memory
or on tape or other medium (off-line processing). This data reduction
is often more complicated and lengthy than the preliminary on-line
processing referred to in (Class 1b).

b. Calculation of information required by the experimenter during the
experiment, for example, kinematics tables and particle energies
corresponding to field strengths in analyzer magnets.

c. Process-control operations, in which the computer directs or
regulates a sequence of events in an experiment. Under program
control the computer monitors the course of the experiment and
supplies signals that cause automatic changes in experimental
conditions, such as starting and stopping times of event counting,
angles of observation of scattered particles, and accelerator
energies. Such applications are designed to relieve the experimenter
of unnecessary labor and to reduce the probability of error in
routine operations.

       *       *       *       *       *

Our final class involves even more complex calculations.


_Class 3 operations_:

a. Complicated treatment of reduced data, including least squares and
curve fitting.

b. Large-scale calculations such as those required for the evaluation
of theoretical nuclear scattering and reaction cross sections, e.g.,
DWBA calculations, which may each require running times of the order
of minutes, even at a modern computing center.

       *       *       *       *       *

Apparently Class 3 operations do not always have to be done during
the course of the experiment; in fact, they can in most cases be
carried out later, leisurely, at the local computing center.
Nonetheless, calculations of the first type, and to a lesser extent
the second, are currently being done at laboratories having large,
powerful computers in their on-line data-acquisition systems.


C. THE COMPUTERS


1. Introduction

Because computers have proved useful in so many fields, many
varieties are now on the market, quite a few of them having
properties highly suitable for nuclear-data acquisition. The
properties particularly useful are, first, the ease with which a
great variety of external input and output devices can be attached
(interfaced to the computer); second, provisions for rapid, efficient
response to interrupt signals from external devices; and third,
usually a means of transferring data from external devices directly
into blocks of memory without use of the central processor, the
transfer possibly requiring only a single memory cycle per word.
(This is referred to as direct memory access through a direct data
channel.)

Several types of small computers have appeared on the market during
the past year, some having 8-bit words, but they are too small for
general data-acquisition use, although valuables for special
applications. For present purposes, the smallest useful machines have
a minimum memory size of 4096 (4k) 12-bit words, which can usually be
enlarged to 32k words by the addition of memory modules, while the
larger machines have minimum memories of at least 8k, with provision
for expansion to several hundred k. Regardless of their size, the
machines of the present generation all have memory cycle times around
1 or 2 µsec.


2. Rough Classification of Computers

Before proceeding with the discussion it is convenient to find a
simple scheme for classifying computers. The scheme adopted here is
to divide them into three loosely defined classes--small, medium, and
large--essentially on the basis of the properties of the basic
central processors:

  Small
     Word length 12 to 18 bits
     Useful memory size 4k
     Number of bits in instruction 3 or 4
     Floating-point hardware orally offered
     Approximate cost range $8500 to $40,000

  Medium
     Word length 16 to 24 bits
     Useful memory size 8 to 16k
     Number of bits in instruction 4 to 6
     Floating-point hardware option sometimes offered
     Approximate cost range $30,000 to $120,000

  Large
     Word length 32 to 48 bits
     Useful memory size at least 16k
     Number of bits in instruction 7 or more
     Floating-point hardware
     Approximate cost range $150,000 or more

Computers do not fall neatly into these three classifications,
especially since manufacturers offer many optional features;
therefore, some argument about the assignment of a particular machine
to one or the other class is possible. This is especially true with
respect to the small and medium types. The properties of a large
number of small and medium-sized computers are given in Appendix A.
Information on larger machines can be found in the Adams Associates
_Computer Characteristics Quarterly_.


D. MATCHING COMPUTERS TO TASKS

Having classified both the computers and the jobs that they may be
called on to do, we now ask this question: How suitable is each of
the three types of computers for each of the three classes of jobs,
given that in every case the acquisition system consists of a single
computer coupled to all necessary input and output equipment?


1. Large Computers

We start with the large computer system. All classes of jobs can be
handled by this powerful system. However, we should question the
wisdom of assembling a system based on a large machine unless a
substantial amount of numerical calculating is anticipated, because
the essential advantage of the large computer--the advantage that
costs so much--is its capacity for rapidly executing highly accurate
floating-point arithmetical operations.


2. Small Computers

The small computer system can handle the jobs of data acceptance,
data manipulation, and output characteristic of the simple Class 1
operations, but they are suitable for very few jobs involving
floating-point arithmetic. In fact, we must usually be skeptical
about the use of small machines for any of the Class 2 operations
except those of the process-control type, which in many cases would
involve little if any arithmetic. (Process-control applications have
been rather few to date, but a rapid increase can be expected in this
field, especially because of the convenience and low cost of small
modern computers.) It is apparent that these machines have been
designed as economical instruments specifically intended to handle
Class 1 jobs. The smallest word length of a machine in this group, 12
bits, is sufficient for storing in one word the output of a
4096-channel ADC unit, but it is not quite so convenient for handling
the output of a typical scaler, which would likely require the use of
two words. The capability of even a small computer system to convert
experimental information into digital form, to transfer it into
memory, to manipulate it, and to present it for inspection in a
digested, convenient form, all at a high rate and essentially
without error, is of immense value to an experimenter who has to cope
with the abundant outflow of data from a modern nuclear experiment.


3. Medium-Sized Computers

The capabilities of medium-sized computers are less clear. These
machines are superior to the small ones mainly in two respects: they
have a more flexible command structure (i.e., they have a larger set
of wired-in operations), and, usually, they have a longer word
length. These features make them easier to program and give them a
limited, but important, capability to execute floating-point
operations sufficiently quickly and accurately for many purposes,
even though these operations must in most cases be programmed, in the
absence of floating-point hardware. We can reasonably conclude that
the medium-sized machines will serve for any use listed in Classes 1
and 2. Certain simpler calculations of Class 3a are also expected to
prove feasible, but few, if any, of those of Class 3b.


E. ON CHARACTERISTIC FEATURES OF COMPUTERS AND RELATED EQUIPMENT

The value of any feature depends on its need in the application
involved; therefore detailed, absolute statements regarding each
characteristic usually cannot be made. However, the Panel has
discussed various features at some length, and we present here some
general comments on the pros and cons of these features. Among the
items discussed are some, such as word length and cycle time, that
represent basic, inherent properties of the computer; while a great
many others, such as priority interrupts, are customarily offered as
options.


1. Word Length

The shorter the word length the cheaper the hardware, generally
speaking, but the less the accuracy in calculations unless multiple
precision is used. For example, although the 12-bit words of the
PDP-8 match the accuracy of data from most ADC's, they are too small
not to match the output data from most counters; furthermore,
indirect addressing is often required because a single word is too
short to include both the operation code and the absolute address of
a memory location. Apart from addressing considerations, a 12-bit
word is too small for many uses, e.g., in general-purpose
pulse-height analyzer applications where 16 bits or, better, 18 bits
should be considered a minimum. Fortran programs for numerical
calculations are in general best run on machines having at least
32-bit words, although 24-bit words are usually acceptable here when
double precision can be used.


2. Number of Memory Words

In general the more words that a system can retain the better; but
the greater the memory, the greater the expense. The cost must be
weighed against the need. For simple handling of data, a 4k memory
may be adequate, but in a large shared-time general-purpose machine a
16k or greater memory is essential. In the latter case, the resident
shared-time monitor will probably occupy at least 6k of the memory,
so with a 16k memory only 10k would be left accessible to users, and
experience has shown that this much can be taken up completely by one
user compiling a Fortran IV program. A 4k memory is adequate for many
process-control applications, but it is too small for many other
applications such as general-purpose pulse-height analyzer use, where
an 8k memory is highly desirable. Adding a supplemental rotating
memory device (disk or drum), at a cost per word about 1 percent that
of core storage, is often preferable to adding core memory. See 6
below.


3. Cycle Time

For most purposes the typical memory cycle time of 1 to 2 µsec is
quite adequate. Some of the modern computers have cycle times under 1
µsec.


4. Direct Data Channels

These allow sequential depositing of digital data from external
devices directly into blocks of computer memory without intervention
of the central processor (direct memory access, DMA). Such input may
require only one computer cycle per word, that being the next cycle
after the one during which the interrupt signal arrives. This is the
fastest means of getting data into memory, but it requires more
external hardware and more complex interfacing than input through an
accumulator of the central processor. Most data-acquisition machines
provide both possibilities. Direct data channels can be valuable for
interfacing to magnetic disks, drums, and tapes.


5. Priority Interrupts (Nested)

These can be very useful. They may cost as little as $125 each,
depending on the machine, and can be used to reduce greatly the
overhead running time losses of the computer. In complicated
data-taking applications many interrupt lines are desirable; 8 to 16
priority levels are generally adequate. The usual Fortran compiler
cannot compile programs that respond properly to interrupts, although
a relocatable object code generated by the compiler can always be
assembled with a machine-language subroutine designed to handle
interrupts. Enlargement of Fortran compilers for data-acquisition use
to include statements designed to handle interrupts is desirable.
(See, for example, the discussion of the Yale-IBM system, Chapter 2,
Section E.)


6. Mass Storage

Magnetic media--drums, disks, and standard magnetic tapes--are
employed here. DEC tapes are useful and reliable, but they have only
a small capacity. The use of such microtapes is also limited by their
incompatibility with typical computer-center equipment. Reliable,
inexpensive incremental magnetic tape units are now available which
can be operated asynchronously at about 300 Hz, too slow for many
purposes. Some of them can also be run much faster in a synchronous
mode. Drums and disks are highly desirable because they provide
program-controlled rapid access to great volumes of data. Typically,
access times are of the order of 17 µsec. In the past few years, good
and inexpensive disks have been developed which are now on the
market. Some suppliers are IBM, CDC, Datadisk, Burroughs, DEC, and
SDS. Disk storage is cheaper per word than core storage by two orders
of magnitude; therefore, it is preferable for applications where data
can be organized serially and where access and transfer time
requirements can be relaxed somewhat. For example, a small DEC disk
system for the PDP-8 holds up to 128k 12-bit words and has an average
access time of 17 µsec and a transfer rate of 16,000 12-bit words per
sec. It costs $6000 for the first 32k of capacity, plus $3000 for
each additional 32k, including interfacing through the direct data
channel. Larger and faster versions are available. Disks (or drums)
should be important in future systems. Magnetic tapes of the
IBM-compatible type are valuable, especially for communication with
machines at computing centers, but tape drives and interfacing are
usually expensive. It often costs $25,000 or more to get a single
tape drive in service, although the next few are usually less
expensive. The cheapest tape drives available cost about $5000. The
cost of interfacing depends greatly on the particular computer. It
may be as little as $5000, but it is often in the neighborhood of
$15,000 or $20,000.


7. Program Input Method

Because they provide immediate access, the most satisfactory program
storage media are magnetic disks and drums, followed by the IBM tape.
The most satisfactory cheap device for input of programs is the
high-speed, punched-tape reader, but the advantages of using small
"cartridge-type" magnetic tapes have recently been emphasized.
Recently, card readers have appeared which are much cheaper than the
older IBM models. They can read 200-300 cards per minute. They cost
about $2000 plus interfacing. Examples: Soroban, General Devices,
Uptime.

A simple means of restoring the basic loader program (other than
toggling!) is desirable. Many computers have this feature, e.g., the
IBM 360 series; the SDS Sigma 2, Sigma 5, and 910 PDP-9.


8. Memory Protection

Hardware memory protection is necessary in multiprogram systems. It
is very helpful in any machine with a batch-processing resident
monitor and in other special situations.


9. Parity Check

This feature is useful for purposes as detecting memory failures, but
it is usually not worth its cost in computer speed and in capital
investment in the case of a small system.


10. Ease and Cost of Interfacing

This is a big subject, partly because the organization of computers
for input and output of data varies with the manufacturer. Some
computers such as the Hewlett-Packard and the DEC models are
especially easy to interface, whereas the automatic channels of the
SDS Sigma computers and the ordinary IBM machines (e.g., the 360
series) are very difficult. The IBM machines require an expensive
control unit. It is said that before a competent engineer could order
plug boards for Sigma interfacing he would have to study the system
for a month or two. However, once interfaced, these machines permit
rapid input of data. Interfacing a $5000 Calcomp plotter to the
automatic channel of an IBM or Sigma series machine may cost much
more than the cost of the plotter.


11. Typewriters

Many small computers use teletype machines as console typewriters.
The ASR-33 teletype has not performed well, but it has recently been
improved. The ASR-35 and KSR-35 have excellent records, and the newer
ASR-37 and KSR-37 (15 characters/sec) are very good. The IBM
Selectric has had a mixed reliability record which is, however,
improving. In every case, expert routine maintenance is required.


12. Index Registers

These are a valuable asset to efficient programming. At least one,
and preferably more, is desirable, especially in the medium and large
computers.


13. Line Printers

These are of great use for obtaining a permanent ("hard copy")
record, especially when large volumes of output are produced;
however, they are expensive, usually costing $20,000 or more
(including interfacing). In order to avoid tying up a large central
processor during typewriter output of masses of data, a line printer
is not only very useful, it is essential for efficient operation (and
to spare the typewriter). A line printer can be _immensely helpful_
and can save much time in the process of developing and debugging
programs. The cost, however, will often preclude its addition to a
modest system. If the system has an IBM-compatible tape drive, the
computer output can be written on tape and later carried to a
computing center for printing. Several industrial concerns are known
to be working on new types of printers, some being dry-copy,
nonpercussive types. One type which has already been marketed, the
Inktronic printer, operates by spraying ink at the paper from small
tubes. The characters are well formed. It operates at about 120
characters per second and costs $5600. Conveniently, it requires
standard Teletype interfacing, and it can be ordered with an optional
keyboard. Although it has exhibited a few new-product ailments in its
first 8 months or so of use, it shows promise of becoming a very
useful device. Another printer operating on a similar principle has
just appeared--the A.B. Dick Company's Videojet printer, priced at
about $4900.


14. Plotters

The overwhelming favorite is still the incremental machine called the
Calcomp plotter. It costs about $5000 and is easily interfaced to
many computers. It is very accurate (about 0.01 in. in each
direction) and provides valuable output to the experimenter. It can
be programmed to plot experimental points and theoretical curves
together on white paper in India ink, relieving draftsmen of
considerable work and doing a more precise job. Other incremental
plotters are now on the market, e.g., the Houston Instruments
version. Varian has developed an electrostatic plotter to sell for
about $15,000.


15. Cathode-Ray Tube Displays

At least four types are in use. The standard scheme involves the
displaying of bright spots under control of the computer, which has
generated appropriate words to cause _x_ and _y_ deflections of the
spot when those words have been transformed by ADC's in the CRT unit.
The pattern is rewritten continuously. A light pen held against a
particular part of the display pattern can be used to signal the
computer. This scheme works well but may produce a flickering image
if the computer is interrupted frequently to handle higher priority
jobs or if the display is so complicated that the rewriting period
exceeds 1/30 sec. The expensive hardware option called a character
generator is considered not worthwhile unless large amounts of text
are to be displayed. On a 10 in. x 10 in. raster a matrix of dots
1024 x 1024 is sensible.

A second scheme involves a disk or drum on which the computer writes
the words to generate the pattern. Separate reading heads send the
words to the CRT unit. Thus the display, automatically rewritten over
and over, is updated from time to time by the computer. The
light-spot cursor and joy-stick method replace the light pen in this
case. (In passing, it is worth remarking that a light pen is only as
effective as the computer program allows it to be, that the effort of
programming for light-pen control is usually not trivial, and that a
substantial amount of core storage may be required. A means of
display control perhaps not so popular as it should be is
sense-switch control.)

A third scheme makes use of a modern storage CRT. The computer sends
the pattern to the CRT only once, and the display can persist until
erased. This method is flicker-free and inexpensive, but the pattern
is not so distinct and sometimes not so bright as in the above
schemes. However, it is cheap. Furthermore, the storage tube can be
used alternately as an ordinary CRT with quite satisfactory
resolution. A storage version is thus possible which reverts to the
standard scheme, for high-resolution inspection, when a button is
pushed. The storage-tube scheme is probably the best buy for use in a
typical small system. The Tektronix Company has recently announced a
storage-tube device, Type 4501, which is said to generate a
continuous video signal suitable for driving large-screen television
monitors.

A fourth scheme involves the generation of a video (analog) signal
corresponding to the display, written on a disk or drum by the
computer. Reading heads then send the video information to a CRT
having a TV raster synchronized with the rotation of the medium. This
is a good scheme where many displays are needed, but it is too
expensive for many applications, costing upwards of $20,000 for the
first unit. (For example, the Data Disc System 6500 Display costs
about $23,000.)

One display feature considered desirable by many nuclear physicists
is rotation of isometric data plots. This can be accomplished in one
of two ways: recomputing every displayed dot or using an appropriate
analog device (potentiometer). Because the latter is so cheap,
clearly its use is more desirable than the recomputation of the
rotated view. Also, using a light pen on a recomputed display is
especially difficult because the inverse computation has to be
performed in order to maintain proper correlation with the original
data. However, it should be noted that the TV raster technique is
limited in this respect: rotating potentiometers cannot be used, and
the image must be recomputed. The technology of displays is
developing rapidly.


16. The Role of External Devices

In many cases, especially where typical standard operations are
involved, it is preferable to use external devices to handle
preliminary selection and sorting of events, rather than to ask the
computer to do the entire job. For example, particle identification
by use of signals from two counters involves one or two
multiplications and additions, which can be carried out almost
instantly by a fairly simple external analog device, whereas a small
computer would likely require at least 500 µsec for the job, assuming
calculation, and perhaps 40 µsec, assuming table look-up.


17. Time Sharing

Computers as small as a PDP-8 have been successfully time-shared by
several users in special applications. The justification given is
that all the peripheral hardware can be shared also, so that the
added constraints and programming difficulties are balanced by
savings in hardware costs. Computers have also been shared for
simultaneous on-line data-taking in low-data-rate experiments. In
working out the economics of time-sharing, the added hardware (such
as CRT's and remote consoles and memory protection) needed to allow
simultaneous access by more than one user, as well as the extra
memory space needed by the time-sharing monitor, should be
considered. The greatest costs, however, lie in the added constraints
placed on each of the users and in the greatly increased cost of
programming. In many cases the use of two or more identical computers
is preferable. However, in large, expensive systems time-sharing can
be very useful.


18. Software That Should Be Supplied by Manufacturer

Complete documentation should be provided, including listings,
step-by-step user instructions, and some fully worked out examples.

     a. Hardware diagnostic routines: To test memory addressing,
     instruction set and to test correct operation of every
     peripheral and special hardware feature.

     b. Systems to edit, assemble, and debug programs in symbolic
     machine language: These should efficiently use any special
     I/O device such as magnetic tape, disk, or line printer.

     c. Efficient subroutines should be provided for operation of
     any special peripheral device purchased from the computer
     manufacturer. Symbolic language source tapes or card decks,
     listings with comments, and examples of use should be
     included.

     d. Conversational Fortran-type programs provided by some
     manufactures are useful for supplemental calculations.

NOTE: The following points apply particularly to the medium and large
machines and become increasingly important as the computer becomes
larger and more complex.

     e. Fortran compiler and operating system, with convenient
     method to insert machine language instructions and
     subroutines. Good compile and run-time diagnostics are
     essential.

     f. Mathematical subroutines should be provided in binary and
     source language.

     g. Complete specifications and documentation for the
     programming system should be supplied, so that programs
     prepared by users can be made compatible. It may be objected
     that this will cost too much, but not to do so will be very
     costly and frustrating to many users.


19. Note on the Cost of Programming

Experience at Brookhaven and Berkeley has shown that a programmer can
produce between 10 and 20 debugged and documented lines of program
per day, depending on such factors as experience, when he is working
on reasonably straightforward programming. When working on a
complicated monitor system he would be considerably less productive.
System programming is obviously very expensive, therefore the average
person exploring the computer market would be well advised to
consider the software support along with the hardware offered in each
case. Manufacturers vary greatly in this respect. A major
contributing factor to the persistent popularity of the PDP-8 is that
the software support is so extensive. _In general, the newer a
computer, the less software is likely to be available._



Chapter 2

DATA-ACQUISITION SYSTEMS


A. INTRODUCTION


1. History

The movement toward computer systems began in earnest about 1962.
Much of the early work depended on the use of magnetic tape for
storage of data, either raw or partially digested, the analysis of
data being carried out later, off-line. More recently, computers have
been used increasingly for on-line processing. The early work is well
known and will not be described here. Some of the more recent systems
are basically very close descendants of one or another of the early
systems. Many varieties are now in service. Most incorporate small or
medium-sized computers, however, extensive new experience has been
gained during the past two or three years of operation of a few large
time-shared systems, in particular those in the tandem Van de Graaff
accelerator laboratories at Yale and at Rochester, perhaps the first
large systems in operation which were planned systematically for
nuclear research. Both operate with multiprogramming monitor control,
background calculations being possible, on a low-priority basis,
simultaneously with data acquisition.


2. Possible Systems

Simple rules for the design of various types of data-acquisition
systems cannot be stated, but some examples of possible systems can
be given. (See Figure 1.)

a. A simple system for pulse-height analysis work can be assembled
from a small computer, a 5-in. Tektronix CRO, an ADC unit, and a
teletype with paper-tape attachment for a cost of about $30,000,
providing that a competent engineer is available, not counting
programming and engineering costs. A Calcomp plotter could be added
for about $6000. To maintain and operate the system at least a
half-time technician-programmer would be required.

[Illustration: FIGURE 1 Basic data-acquisition system.]

b. A general-purpose system for use in an accelerator laboratory can
be assembled from a medium-sized computer, two typewriters, four
13-bit (0-8192) ADC's, six 18-bit (0-262,144) counters, a 10 in. x 10
in. CRO display unit with light pen, two tape drives (for IBM tape),
a Calcomp plotter, and a fast paper-tape reader for about $175,000
plus the cost of engineering service and programming. At least one
full-time technician-programmer would be needed for maintenance and
programming.

c. A large shared-time system of the smallest configuration which
makes much sense consists of a large computer with a 16k memory, two
typewriters, a fast punched-tape reader, four DEC tapes (or the
equivalent), one IBM-compatible magnetic tape, one CRO with light
pen, one incremental plotter, input devices for experimental data
(ADC's, counters, etc.), plus an interfacing system to link the
external input-output devices to the computer. The interfacing system
may include a fixed-wired "front end," such as that used at Yale, a
small computer, such as that used at Rochester, or both. The hardware
would probably cost over $400,000 exclusive of engineering, and to
this must be added a large expense for programming, even if the
manufacturer supplies a satisfactory shared-time monitor plus all the
usual software. Three men would be needed to assemble, maintain, and
operate the system: an engineer, technician-programmer, and a
full-time programmer, or some equivalent combination, assuming use of
the system in a large laboratory with an active and continually
developing research program. Thus the cost of this "stripped-down"
system must be expected to reach $500,000 before it is in full
operation, and the cost of keeping it going, including salaries,
overhead, and replacement parts will likely exceed $50,000 per year,
although this could perhaps be trimmed somewhat once the system is
running. Furthermore, to run efficiently, the system would need
additional components: another 16k (at least) of core memory, another
IBM-compatible magnetic-tape drive, and a line printer. A rotating
memory device would also be helpful. These would raise the cost by
well over $100,000. It is apparent that large time-shared systems are
so expensive that they can ordinarily be justified only in the
largest, most lively research establishments.


3. Small Computers as Satellites

In medium and large systems the use of small computers for coupling
input and output devices to the main computer offers a number of
attractive advantages, especially now that mass production and
competition have brought the prices down so low that a large amount
of hardware nearly ideal for the purpose is available at a bargain.
Some advantages: (1) The small machine can control data acquisition,
accumulating blocks of data while the large machine is doing
background calculations, interrupting those calculations only
occasionally to transfer raw or partially processed data. (2) The
small machine can continuously control the monitor CRO. (3) It can
control output devices such as a plotter, line printer, rotating
memory, or tape drive. (4) It can carry out many logic operations on
the incoming data. Experience has shown that such operations are
numerous, and from the economic point of view they should not be
allowed to tie up the larger machine, which, at the same time, can
better be engaged in complicated calculations. In some cases the use
of two small satellite computers can easily be justified. The chief
disadvantage: Programming can be complicated. However, if the larger
machine already has a time-shared monitor which recognizes the small
machine as a typical input-output device (as is the case with the
PDP-6 plus PDP-8 system at Rochester) the programming problem is not
bad.

In the following five sections descriptions of a number of
data-acquisition systems of various types and sizes will be given in
order to illustrate concretely some practical system configurations.
In each case a breakdown of costs and a discussion of the lessons
learned in connection with planning, construction, and operation will
be included. The systems are of the following types: two small, one
medium, one large, two multiple-CPU, and one process control.


B. A SMALL TIME-SHARED DATA-ACQUISITION SYSTEM BASED ON A PDP-7
COMPUTER


1. Introduction

In 1966, two identical computer systems based on PDP-7 computers were
set up in two different locations at the Lawrence Radiation
Laboratory (LRL), to be used by several groups of experimenters (see
Figure 2). Assembly of the hardware for the first system was
completed 6 months after delivery of the computer. Assembly of the
second system required only 3 months. Two years after operation
commenced, the first satisfactory time-sharing monitor was completed
and put into service. The basic use of these systems is pulse-height
analysis. In principle many other types of operation are possible.

[Illustration: FIGURE 2 PDP-7 data-acquisition system at Lawrence
Radiation Laboratory.]

[Illustration: FIGURE 3 A switch panel used for data taking and
control of CRT display in conjunction with the PDP-7 computer. The
switch-setting codes can be read into the PDP-7 accumulator under
program control and are used to select branch points in the program.
As many as eight of these units can be connected to the system. The
lights are used to indicate program status.]


2. Operational Features

Data-reduction jobs currently possible in the shared-time operating
mode include spectrum stripping, normalization, smoothing, storage
and retrieval of data from magnetic tapes, graph plotting, printout,
energy calibration, background fitting, peak integration, and
transfer of data from a remote analyzer. Remote control of the
computer from up to eight experimental locations is possible using
inexpensive switch panels (Figure 3). Remote slave CRT display is
also provided. Multiparameter pulse-height acquisition and analysis
can be done on a time-shared basis but often requires all the
computer's time and memory.


3. Hardware

The hardware configuration is shown in Figure 2. The PDP-7 computer
was supplied by the Digital Equipment Corporation with an 8k memory
(18 bits) extended arithmetic hardware, microtape (Dectape), paper
tape, teletype, and cathode-ray tube (CRT). The other items were
built or interfaced at LRL.

Automatic memory increment and memory-protection hardware, together
with suitable programming, allow a user to carry out simple
data-reduction jobs with a live CRT display while two other users are
independently acquiring separate, 2048-channel, pulse-height spectra
in part of the computer memory, with computer-controlled-gain
stabilization. ADC dead time per pulse is less that 40 µsec. Up To
6144 words of the memory can be used for data (one PHA channel per
word), while machine language programs fill the remaining 2048 words
of memory.


4. Lessons Learned from Operating Experience

The system works well for pulse-height analysis, but for new
applications, e.g., nuclear magnetic resonance magnet control, it
needs additional hardware and programs.

Two groups of experimenters, doing chiefly pulse-height analysis
experiments are very satisfied with the system. Another group, with a
wider range of interests, has been dissatisfied because of the time
lag to implement new experiments.

One programmer is now engaged full time preparing more programs.

Lack of free computer time has become a limitation for both users and
programmers.

Provision for programming at the outset was inadequate. One full-time
systems programmer should have been assigned to these systems for 18
months.

Experimenters need Fortran or similar language capability. A disk, or
more core memory, would make this practical.

The memory size is totally inadequate for multiple users because of
the large amount of data space needed for the high-resolution spectra
now obtainable with Ge(Li) detectors. An external 8k memory is being
acquired for data acquisition in each system so that more of the
computer memory can be used for computing.

Memory CRT's are needed to provide independent displays for each
user. A separate teletype for each user would be invaluable.

A disk memory is needed for rapid overlay of programs and for sorting
of multiparameter data.

A "czar" should have been appointed for day-to-day assignment of
facilities, consultations with users, and routine maintenance and
upkeep of the hardware and programs. The "czar" could be a good
electronics technician interested both in programming and in physics.


5. Costs

System costs for the PDP-7 with time-sharing are given in Table 1.
Fabrication time is included as a dollar cost. Engineering and
programming times shown are one half those charged against two
identical systems.

Additional special-purpose experimental equipment commonly used with
the system includes gain stabilizers, analog pulse derandomizers,
amplifiers, pulse pileup rejection, low-noise preamplifiers, and
Ge(Li) detectors.

  TABLE 1 System Costs--PDP-7 with Time-Sharing[A]
  ---------------------------------------------------------
  Items                              Costs       Man-Months
  ---------------------------------------------------------
  CPU (8k, EAE) PDP-7, 1966          $ 52,000
  Dual microtape                       10,350
  Calcomp plotter                       4,825
  Calcomp interface                       200       1/2
  CRT controller                        2,300
  Large screen CRT                      3,500
  3 small CRT's (5 in.)                 1,995       1/2
  Mag tape (556 BPI, 30 IPS)            8,690
     (with erase head)
  Mag tape interface                      200        4
  Memory protection                     2,000        3
  Direct memory multiplexer             2,000        2
  2 ADC's (4096-channel, 35 µsec        5,000        -
     per count)
  ADC multiplex interface (automatic    2,000        3
  memory increment)
  8-parameter input to ADC              1,500        1
     (analog multiplexer)
  4 remote memory switch panels         1,200        2
  Cabling to experiments                1,500        1
  8k external, 18-bit, 2-µsec memory   12,000        3
                                     ----------  ------
                                                    20
  Programming                                       18
                                     ----------  ------
                                     $113,260       38
  ---------------------------------------------------------

  [A] The PDP-7 is no longer made. Its modern equivalent is the PDP-15.


C. A SMALL SYSTEM BASED ON A PDP-8 COMPUTER


1. History and Hardware

This second example of a small computer system is also taken from
experience at LRL. It was planned in February 1967 and first put into
operation in the summer of 1967. Data were first taken with the aid
of the system in the spring of 1968, and the system programming was
completed in May 1969. The system is used extensively in experiments
with the Bevatron.

[Illustration: FIGURE 4 PDP-8 data-acquisition system at Lawrence
Radiation Laboratory.]

The computer-system hardware consists of the items shown in Figure
4. The PDP-8 has 4k of memory. The disk is a Data Disc unit with
a removable disk (128 tracks and a movable head) on the same shaft
as a smaller disk and three fixed data heads. Two of the fixed-head
tracks are devoted to the display: they drive a hardware-translator
continuously. A single display track is used when the number of
points does not exceed 2000. For larger displays two tracks are used
alternately.

The display is controlled from the switch panel. On-line operating
functions may be controlled both from the switch panel and from the
teletype.


2. Programming

Three classes of programming have been completed:

_System Programs_: Symbolic Text Editor, Assembler, a general-purpose
library system--all disk oriented.

_Data-Taking Programs_: These cause the ADC to be read, control
elementary sorting, update histograms resident on the disk, write raw
data on tape, and monitor the beam. The Bevatron has approximately 1
sec of beam every 6 sec. During a beam pulse the computer is devoted
entirely to acquiring data, saving raw data in core, on the disk, and
on tape. After a beam pulse, the 13-disk histograms are updated, then
the display programs are read into core memory and the display is
updated. The system is designed to be capable of accepting over 1000
events per beam burst, and it has met this requirement.

_Simple Data-Analysis Programs_: These compute displays (linear, log,
isometric, and contour--all double precision), read out the sealers,
monitor the real-time clock, allow resorting of raw data from tape,
and generate tapes for remote plotting.


3. Lessons from Operating Experience

The system now functions as originally intended and does its job very
satisfactorily.

The experimenter relies heavily on the main computer center for data
processing.

In assembling this system now, one would buy the disk already
interfaced by the computer manufacturer; furthermore the manufacturer
now offers programs that would greatly reduce the programming costs.

A memory scope would eliminate the need for a disk-to-CRT display
interface.

Less-expensive magnetic tapes are now available. However, it would be
better to buy the tape already interfaced by the manufacturer of the
computer.

The added cost of buying a 16-or 18-bit computer would have been
almost completely offset by savings in the cost of programming.

The addition of a fast printer (e.g., Inktronic $5600) would have
paid for itself in time saved during programming but would not be of
much use in experiment.


4. Costs

The costs of the PDP-8 are given in Table 2.

  TABLE 2 System Costs PDP-8--1967
  ---------------------------------------------------
                                 Costs     Man-Months
  ---------------------------------------------------
  CPU, 4k, 12-bit                $18,000       -
  Data disk                        8,300       -
  Disk interface                   2,500       6
  CRT display control              1,000       1
  CRT                                700       -
  Mag tape (556 BPI, 30 IPS)       8,800       0
  Mag tape interface               2,000       6
  Misc. interfaces                 2,700      12
  8 scalers (on loan)               -          -
  ADC (4096-channel, 35-µsec       2,500       -
      dead time)
  8-parameter input to ADC         1,500       -
      (analog multiplexer)
  Remote console (switch panel)      300       -
  Time-of-day clock                1,000       -

                                 --------
                                 $49,300

  Systems programs                            12
  Data-handling programs                      12
  Engineering diagnosis, debugging             9
                                             ----
                                              58
  ---------------------------------------------------

[Illustration: FIGURE 5 Block diagram of EMR 6130 data-acquisition
system at Columbia University.]


D. A MEDIUM-SIZED ON-LINE COMPUTER SYSTEM


1. Introduction

An EMR 6130 computer system has been installed and is being prepared
for use with Columbia University's Neutron Velocity Spectrometer
data-acquisition and analysis system. The spectrometer is
characterized by high data rates and many events per burst. At
present, peak arrival rates are approximately 10^6 events per second,
with 40-60 events per burst and a burst rate of 70 Hz. The arrival
distribution is random; therefore, 10 percent of the interarrival
intervals are 100 nsec long, and 1 percent are 10 nsec long. In the
future, peak arrival rates of 10^7 events/sec and 400-600 events per
burst are possible, with a burst rate of 300 Hz. With an appropriate
time-of-flight "front end," the 6130 will be able to handle the
anticipated faster rates.

The EMR 6130 is a 16-bit, 775-nsec computer. The memory has a
multibus structure which permits each bus to communicate
simultaneously with a separate memory module. Up to four memory buses
may be purchased. The Columbia system has two memory buses. If a
high-speed buffered data channel is used, block transfer may occur at
memory cycle speeds. With two buses, data may be stored in two memory
modules at rates up to twice memory speed. Alternatively, one bus,
channel, and one or more memory modules may be dedicated to data
acquisition, while the central processor and standard peripheral
devices, using the second bus, simultaneously operate in the
remaining memory modules.


2. Description of the System

A block diagram of the Columbia system is given in Figure 5. The
system has three 8k core modules. Memory bus 1 is dedicated to a
high-speed channel serving the time-of-flight acquisition system.
Memory bus 2 serves both the central processor and a second
high-speed channel. Low-speed input-output devices, such as the
operator's console, teletype, card reader, and plotter communicate
directly through the processor. The high-speed input-output devices,
namely, a magnetic tape unit, line printer, fixed head disk, and
interactive CRT display, communicate through the channel.

The box designated as "time-of-flight system" represents special-purpose
electronics, including a 50-mHz clock, time-quantizing circuits
which "clock" an input event from one of the detectors to the nearest
clock pulse following its arrival, a 50-mHz counter, and a 16-word
derandomizing buffer capable of storing a new word of data (i.e.,
arrival time) every 20 nsec. The number of channels, nominally
16,000, is limited not by the front end but by the amount of core
available for histogram storage in the 6130 system. (For the high
data rates anticipated in the future, the time-of-flight clock speed
and derandomizing buffer data acceptance rate will be increased
to 100 mHz. At the same time, an accumulating buffer of several
hundred words capacity, with a 20-mHz data acceptance rate, will be
added to empty the derandomizing buffer and store temporarily the
time-of-arrival data prior to its transmission to the 6130 system.)

[Illustration: FIGURE 6 Diagram illustrating mode of utilization of
core memory in the Columbia System shown in Figure 5.]


3. How the System is Used

During the time-of-flight experiment, memory is utilized as follows
(see Figure 6). The channel dedicated to data acquisition writes on
alternate bursts, into two buffer regions, of approximately 100 words
each, in the top of memory module 3. The remaining parts of memory
module 3 and all module 2 will be devoted to histogram storage (i.e.,
time-of-flight channels). Module 1 will contain a stripped-down
monitor program and all data-handling programs, including buffer
regions for the external devices other than the time-of-flight front
end. Programs will be capable of referring to all module 1 or 2 in
full concurrency with data acquisition. Reference to module 3 will
also overlap data acquisition, except for a period of high input data
rate of 100-to 200-µsec duration per burst. With the type of memory
allocation described, the system will permit the use of all standard
I/O devices, concurrent with the essential operations of input data
buffering and histogram generation. Thus, new data may be stored on,
or old data retrieved from, the disk or magnetic tape; either new or
old data may be displayed on the CRT; and the same or other data may
be output with the plotter or line printer. Control information will
be input from the teletype, the operator's console, or from
special-purpose switches. The importance to the physicist is that
hard copy output is immediately available during data acquisition and
may be used to monitor, or modify, the experiment.

Subsequent to the input data increase, a high-speed memory
incrementing channel will be used to input time-of-flight data
directly to the histogram area. With this channel the buffer area in
module 3 will no longer be required. Histogram data will be stored in
all modules 2 and 3, and no program intervention will be required for
histogram generation.

Between data-acquisition runs, the system will be used for data
analysis.


4. Present Status

The computer, with two memory modules and one channel and bus, was
delivered in July 1968. The remaining memory module channel and bus
were delivered in the fall of 1968, the CRT arrived in June 1969,
and the line printer (which was not purchased from EMR) came shortly
afterward. The first time-of-flight run with this system was scheduled
for December 1969. During the period from delivery to the first run,
one full-time programmer and approximately half the time of one
physicist were devoted to the debugging of manufacturer-supplied
programs and the writing of the on-line programs required for the run.

It has been hoped that the system would be used extensively for the
analysis of previously acquired data, beginning shortly after
delivery; however, very little such use has proved possible,
essentially because of the unreliability of the 100-cpm card reader
supplied by EMR. The lack of a line printer was also a factor. A more
reliable reader has been purchased. The delivery of a line printer
should rectify the second need.

The development of high-speed, buffered, time-of-flight front ends
has been a continuing interest at Columbia. It is therefore difficult
to estimate the precise costs of the time-of-flight system developed
for use with the 6130. A rough estimate of the design and development
time is approximately 3 engineer man years.


5. Lessons from Development and Testing Experience

Columbia chose to order the EMR 6130, even though at that time (1966)
it was not in production, because it seemed a very powerful machine
which matched the needs of the system planners. The alternate
possibility open was to order a larger, much more expensive machine
of proven capability. As it turned out, difficulties in the
development of the 6130 caused a delay of over a year in the delivery
of the main frame and of over two years in the delivery of the CRT
display. (When these delays became apparent, EMR loaned Columbia a
24-bit computer and also a small display for use during the interim
period.) The EMR 6130 is perhaps the most powerful 16-bit computer
available today, in spite of one or two changes in the original
specifications, but in order to get it Columbia apparently traded
time for money.


6. Cost

The costs of the Columbia University EMR 6130 system are given in
Table 3.

  TABLE 3 Cost of Columbia University EMR 6130 System
           (Prices from EMR Except where Indicated)
  ----------------------------------------------------------
  1  Central processor with 16k core memory          $65,500
  1  Additional 8k core memory                        17,850
  1  Teletype, model 35                                1,930
  2  Word/byte buffered channels                      10,300
  1  Additional memory bus and control                 4,300
  1  Additional cabinet assembly                       5,000
  1  Card reader, 100 cpm                              4,100
  1  Magnetic disk and control                        16,800
  1  Tape transport and control                       26,000
  1  8 levels, priority interrupt                      1,000
  1   CRT display, including vector generator and
        light pen                                     27,750
  1  300-lpm line printer[B]                          18,000
                                                    --------
                                                    $198,530
  ----------------------------------------------------------

  [B] Purchased from printer manufacturer with 6130 interface.


E. A LARGE SYSTEM BASED ON A SINGLE COMPUTER (THE YALE-IBM
NUCLEAR-DATA-ACQUISITION SYSTEM)


1. Introduction

Since early 1966, Yale and IBM Research have been engaged in a joint
study in the application of computers to nuclear-data acquisition.
The main goal was the production of an integrated hardware-software
system which is fully under the control of the experimenter in the
sense that he can define his entire data acquisition and analysis
process with a Fortran program.

The joint study may be divided into four areas: (1) Development of a
suitable general and powerful data-acquisition interface and control
unit (front end) with a set of compatible nuclear instrumentation
modules (scalers, ADC's, and general-purpose input registers). (2)
Development of a suitable display system. (3) Development of a
data-acquisition language (as an extension to Fortran) and the
necessary library routines to support this language. (4) Development
of a general-purpose multiprogramming system for the selected
computer (the IBM System/360, Model 44) into which the
data-acquisition system could be incorporated.

The first three areas became operational in July 1967, within three
months after delivery of the computer, using the standard batch
programming system for the 360/44 as a basis. Development continues
on the multiprogramming system, which has now reached a state where
users inexperienced in using the system can compile and execute
Fortran programs, but the data-acquisition components are not yet
operational.


2. Description of the System

Nuclear data are input by means of a general-purpose
nuclear-data-acquisition interface and control unit, organized around
the concept of an event, an occurrence in the real world which causes
the outputs of a group of instruments selected by the user to be read
into computer memory. Sixteen independent events are provided for,
with each of which may be associated any or all of 30 different
instruments (scalers, ADC's, or general-purpose monitor registers) by
means of a diode plug board matrix. The instruments themselves, also
designed and built by IBM, are modular and completely interchangeable
and enable the experimenter to configure his experiment in any way
desired, i.e., to determine not only which instruments are to be read
but also in what order. Exclusion logic is provided to prevent
processing of certain events if and when other defined events occur
simultaneously (Figure 7).

The cathode-ray-tube display unit provides a 1024 x 1024 point plotting
oscilloscope with seven levels of intensity, character-generation
hardware, a light pen, and a programmed function keyboard, by means
of which the user can call in programs by pushing buttons. Such
programs can perform any function from changing displays gains to
curve-fitting. They may be system-supplied or user-written and may
be (and usually are) written Fortran. A parallel, high-resolution
photographic system permits computer assembly of publication quality
illustrations.

[Illustration: FIGURE 7 Block diagram of the IBM 360/44 system at
Yale.]

The data-acquisition and display-programming system is composed of a
group of subroutines which may be called from Fortran programs for
performing the various processes in data acquisition and display. For
this purpose, a considerable number of additional statements have
been added to the Fortran language. These statements perform such
functions as defining multidimensional pulse-height analyzers in the
computer memory, performing pulse-height analysis using incoming data
as channel numbers, and defining separate programs to process each
of the 16 classes of input events. All the special statements that
make up the new data-acquisition language are implemented by means
of a preprocessor which converts them into Fortran coding, which the
standard 360/44 Fortran compiler then processes.


3. Software System

The general-purpose multiprogramming operating system is a multilevel
priority system designed to provide access to the system
simultaneously by an, in principle, unlimited number of users, each
with unique priority. Unlimited means that there is no arbitrary
restriction on the number of users; the nth user can always get
access if the facilities his particular job requires are not already
in use. Two types of user are recognized by the system: The basic
unit of execution is the logical user, or task. Each logical user has
a unique priority level. Switching between users is carried out as a
response to I/O, timer, or external interrupts, at which time the
highest priority user in a position to execute gains control of the
central processor. The basic unit of memory protection is the
physical user, composed of one or more logical users engaged in a
common cause. Physical users correspond to real people doing
independent work simultaneously. By dividing his work up among a
group of logical users, a person may take advantage of the parallel
processing capabilities of the system in a natural way. Since logical
users within a physical user are not memory-protected against each
other, they may communicate rapidly, at full machine speed.
Communication between different physical users is also possible, via
real or simulated I/O devices. While this system by no means
guarantees execution time to any but the highest priority user, it is
adequate in a single-experiment environment. The assumption is that
the experimenter, who has actual control of the computer at all
times, loads his logical users in the order in which he requires
their priorities. Following this, other users load their jobs,
getting whatever memory and I/O facilities remain. The amount of
processor time available to the other users varies inversely with the
experimenter's counting rate and the amount of processing he does on
his data. In most experiments, the experimenter uses significantly
less than 50 percent of the processor time simply because those
experiments requiring the sophistication of the computer also have
rather low counting rates. _A priori_, it is estimated that the
simple priority algorithm described above is not only adequate but
pays a dividend in terms of reduced system overhead time as compared
to a more elaborate algorithm. It also guarantees that no data will
be lost due to the lower priority users being in the machine.

In general the new system will provide all the facilities of 44PS
within the multiprogramming framework, including execution of the
Fortran compiler simultaneously with data acquisition.

  TABLE 4
  --------------------------------------------------------------
  The Basic System
  --------------------------------------------------------------
  CPU:
    with 128k-byte memory, 1-µsec registers,
    external interrupts, floating point, one
    high-speed multiplex channel, one low-speed
    multiplex channel, and one single-disk
    storage drive                                    $291,280.00
                                                     -----------
  Standard I/O gear:
    one 2403-V tape drive and control, 2701
    data adapter for front end, 1442 card
    reader/punch, 1443 printer, 1827 data
    control unit, four disk cartridges                164,259.00
                                                      ----------
  Data-acquisition and display subsystem[C]:
    Display system (RPQ on 1827) with
    function keyboard and light pen                    19,000.00

    2972-VII Scientific Interface and Control
    Unit (front end)                                   40,000.00

    6 LeCroy model 157M general-purpose registers
    and ADC interface to 2972, as designed for
    Maryland                                            5,950.00

    2 LeCroy model 150B scaler banks (each contains
    eight 15-bit scalers with separate inhibit,
    strobe, and reset, as modified for Maryland)        3,900.00

    2 LeCroy interfaces to connect model 150B
    to 2972                                             2,000.00

    4 Northern Scientific 4096-channel ADC's            8,800.00
                                                      ----------
    Data-acquisition and display subtotal              79,650.00
                                                     ===========
                                          TOTAL      $535,189.00
  --------------------------------------------------------------

    [C] As previously stated, the data-acquisition and display subsystem
  intalled at Yale is the laboratory prototype of the IBM equipment,
  for which Yale paid only a nominal sum.


  TABLE 5
  -------------------------------------------------------------
  Additional Items Needed to Make a System Identical to the
  Yale System
  -------------------------------------------------------------

  CPU and peripherals:
    additional high-speed multiplex channel with
    extra subchannel, high-speed (1/4 µsec)
    general registers, additional single-disk
    storage drive, memory protect, additional
    tape drive (240IV),[D] 1627 (Calcomp) plotter
    and adapter, keypunch, six additional disk
    cartridges                                      $114,316.00

  Data-acquisition subsystem
    2 additional Northern Scientific 4k ADC's          4,400.00
    2 additional LeCroy 157M registers                 1,400.00
                                                     ----------

  Costs of extras                                    120,116.00

  Grand total for basic system                       535,189.00
                                                     ----------
  Cost to copy the Yale system              TOTAL   $655,305.00
  -------------------------------------------------------------

    [D] About $20,000 can be saved on tape drives by using the slowest
  ones (30k bytes/sec) rather than the 120k bytes/sec units shown here.


4. Costs

To the laboratory interested in developing a system of the magnitude
of the Yale system, but not a copy, it must be reiterated that
neither Yale's out-of-pocket costs nor the cost of copying the system
represents the total cost of development. IBM's development costs are
not known, but they may be assumed to be very large.

From IBM's viewpoint, the ADC and scaler project is the least
successful part of the whole project. Although those instruments are
technically excellent, IBM is either unwilling or unable to sell them
at a price competitive with the costs of front-end and interface
equipment available from the traditional nuclear instrument
manufacturers. However, ADC's and scalers available from the
traditional sources can easily be interfaced to the front end (whose
price is in keeping with its power and versatility). The University
of Maryland has followed this procedure.

We therefore present the cost of copying the Yale system by some
other laboratory. In Tables 4 and 5 following the example of
Maryland, we have not selected IBM ADC's and scalers but rather less
expensive components from traditional manufacturers, together with
suitable adapters available commercially. The prices shown are to be
considered strictly reference numbers and in no way constitute price
quotations.


5. General Comments on Experience with the System

Starting by producing an operational data-acquisition software system
running within the standard batch programming system for the 360/44
enabled the system to become operational within three months of the
delivery of the computer. This not only enabled it to do useful work
almost immediately but also enabled important experience to be gained
which is being applied to the development of the multiprogrammed
version.

One of the main lessons so far is that a batch-oriented system barely
begins to tap the real-time potentials of a computer such as the
360/44. In a batch system, whatever analysis is needed during data
acquisition must be somehow tied to the processing of events. If this
is not possible, it is necessary to stop data acquisition in order to
do analysis even though, on a millisecond time scale, plenty of CPU
time is available during acquisition. Multiprogramming software is
necessary in order to utilize this available time. This means that
multiprogramming not only makes the machine available to several
people at a time, but, more important, it makes large amounts of
parallel processing power available to the experimenter.

It has also been shown quite conclusively that the ability of the
physicist to program his own experiment (in Fortran) gives him
enormous power, power which simply would not be available on a
suitable time scale if he has to queue up for the services of a
system programmer.

While the generalized event structure gives the experimenter
considerable ability to deal with complex experimental situations, it
has an overhead associated with it which limits it to about 5000
events per second. This is, of course, adequate for all experiments
that demand such an event structure. For simple pulse-height
analysis, it is unnecessary overhead, but it can be "turned off" in a
trivial way, by simply defining the completion of filling of the
buffer as an event and calling a special pulse-height-analysis
program to process the entire buffer, bypassing the event sorting.
This allows for close to 100,000 pulse-height analyses per second.

There are, however, few situations that justify using a computer as
powerful as the 360/44 in a manner just described (i.e., doing
nothing but simple addition 100,000 times per second). Therefore,
such simple experiments will shortly be handled by means of a link
between an existing multichannel analyzer and the computer.

The system does not suffer from having the front end directly
connected to the 360/44. The data channel on the 360/44 is
sufficiently sophisticated so that it performs all the functions that
one might relegate to a small CPU placed between the front end and
the 360/44, without any interference with the program currently
running in the CPU. The one application described above, which does
warrant a separate processor, is handled best by attaching the
processor to a separate input port rather than by placing it between
the front end and the computer. This enables it to do its intended
job without acting as a bottleneck in jobs requiring the power of the
front end. It also, incidentally, will function as a completely
separate data input terminal if two simultaneous terminals should
ever be required.

The particular display system employed has worked very well. Because
the display list is in the main memory of the computer, programming
of light-pen and other manipulative actions is extremely easy, but at
the price of large amounts of memory being tied up. It is clear that
the system cannot support two such terminals if they are to be truly
independent of each other. It is equally clear that the display is as
useful in data analysis as it is in data acquisition. A second
display terminal is therefore being added. The selected unit (built
by Computer Displays, Inc.) is oriented around the Tektronix 611
storage oscilloscope. It provides both alphameric and graphic
display, as well as an interactive device (a cursor moved by means of
a joystick) for a price of $8000 to $12,000 plus the cost of
interfacing to the computer.


F. MULTIPLE-COMPUTER SYSTEMS


1. Introduction

At the Rutgers-Bell (RB) nuclear physics laboratory, work has been done
with two different two-CPU systems. The first of these represented
essentially two duplicate processors (Figure 8), and the second, now in
the process of implementation, two processors of different size and
capability (Figure 9). While full data are not yet available on the
actual performance of the second system, an outline of the experience
to date will be given.

[Illustration: FIGURE 8 The two-central-processor system of
Rutgers-Bell.]


2. Two Equivalent Processors

The initial success of the original RB SDS 910 data-acquisition
system was soon tempered by a result of its popularity: during most
experiments the computer was unavailable for program development or
data analysis. Since most experiments required the use of displays
and light pens in at least one stage of data analysis, the computer
center could not handle the work.

[Illustration: FIGURE 9 The new Rutgers-Bell Sigma 2-Sigma 5 system.]

The solution adopted was to acquire another computer with the same
instruction set (an SDS 925) and to provide switches such that the
line printer, card reader, and plotter could be run from either
computer. No provision was made for direct transfer of data from one
computer to the other.


3. Lessons from Operating Experience

In practice this system worked out quite well. There was complete
interchangeability of programs from the 910 to the 925, which
differed only in being five times faster. Normally the switchable
peripherals were run from the 925; when the group taking data wished
to print or plot current spectra, they consulted with the 925 users,
then used the peripherals with little more difficulty than
permanently attached units would have involved.

A further advantage of the switchable peripherals, in addition to the
cost saving, was that the experiments associated with the 910 could
proceed while the peripherals were being serviced. The 910 is
exceedingly reliable, averaging less that one main frame failure per
year, and the 925 is nearly as reliable. The vast majority of service
calls have been occasioned by the peripherals and have competed with
data analysis but not with accelerator utilization.

In addition to the switched peripherals, both computers were equipped
with two magnetic tape transports, electric typewriter, and
high-speed paper-tape reader and punch. While these units were also
subject to downtime, the paper-tape system and the typewriter could
be exchanged between the 910 and 925. Only the magnetic-tape
transports required the use of the 910 CPU during servicing, and the
presence of two transports has usually meant that the second one
could carry the load until the weekly accelerator maintenance period.

While the reliability record of the central processors has been
excellent, that of many of the peripherals has not. Here is an
excellent justification for renting computing equipment: if units do
not work well, they can be returned. For a time, a low-cost card
reader (100 cards per minute) built by NCR for SDS was used. It was
unacceptable in reliability and was replaced by the Univac reader
which came with the 925. Another unit returned was a cartridge
magnetic-tape system built by SDS. The Ampex TM-4 magnetic-tape
transports on both the 910 and 925 have been consistently poor in
reliability, but no other unit has been available to replace them. A
manufacturer's name does not seem to be a guarantee of good or bad
quality--the line printer, also made by NCR, has been excellent both
in reliability and print quality.


4. Limitations on a Twin-Computer System

While the two-computer system generally rated high in user
satisfaction, considerations of performance have led to the design of
a larger and more powerful system with totally new components. The
925, without wired multiplication or floating-point operations, was
too slow for theoretical computation or for many types of data
analysis such as those using Monte Carlo methods. Interactive methods
of analysis, using a display and light pen, have been found very
effective in the cases where the 925 could accommodate them but have
not been available through either the Bell Laboratories or Rutgers
computer centers.

A further limitation on the earlier system was that only one person
could use the 925 at a time. The generation of a display involved the
full time of the CPU, and while multiprogramming might have been able
to divert some CPU time, the 8k memory size did not permit it.

Data acquisition on the 910 was limited in array size to the capacity
of the core memory. For multiparameter experiments, three, six, or
even twelve 4096-channel arrays have been stored in core, but the
advantages of live display available with core storage have
discouraged anyone from handling large arrays by logging raw data on
magnetic tape for analysis later. Memory expansion would have been
desirable, but the necessity of making the expansion on both the 910
and the 925 effectively doubled the cost.

Limited flexibility, then, is a major drawback of this type of
system. As long as only two users needed to be accommodated, and each
could adapt to exactly half of the total core storage, it was
satisfactory and provided redundant facilities to guard against
experiment downtime due to computer failures.


5. New Directions

In ordering a new computer powerful enough to handle most of the
nuclear physics laboratory's data analysis and theoretical computing
tasks, cost ruled out the acquisition of a pair of program-compatible
computers. It was recognized that desirable features of the original
system would have to be obtained in new ways. Accessibility of the
system for programming could be improved by running a simple
time-sharing monitor on it. Reliability could be enhanced by avoiding
bargain peripherals and using only items of demonstrated high quality
and by the capability of running the peripherals on either computer.

The use of a separate CPU for data collection still seemed
particularly desirable, however. A combination of a large (by present
standards) computer with a powerful small computer as a front end was
designed. It includes a display disk for refreshing displays without
CPU attention, as well as for storing data arrays too large to be
kept in core. The computers selected were a 32k, 32-bit SDS Sigma 5
and a 12k, 16-bit Sigma 2.

The new system, with separate and nonequivalent computers, will have
advantages over the old system in data analysis and general
computation, because these will be done on the larger computer,
either in time sharing or batch mode. Time sharing should enhance the
flexibility of the system by making it easier to generate and debug
new programs, in addition to improving the accessibility.

For the data-collection computer, RB will lose the advantage of a
separate computer on which complete debugging of programs may be
done. This loss can be tolerated since the fraction of the load
carried by the Sigma 2 will be less than that carried by the 910 in
the old system. In the old system, very few distinct data input or
display programs were written. A few subroutines and their calling
parameters sufficed for all needs for six years; the logic and I/O
operations unique to each experiment were written in Fortran by the
experimenters.

In the new system, the Sigma 2 will be concerned with the operations
used in the data acquisition and formating of displays; most of the
rest can be left in the Sigma 5, with routines sent over to the Sigma
2 under the time-sharing system. If the user should prefer, he can
operate the Sigma 2 directly and make use of the Sigma 5 only for
data storage.

Until very recently, program development on the Sigma 2 has been slow
because it lacked means of getting program listings quickly. We have
now developed an assembler for the Sigma 2 which runs on the Sigma 5.
The availability of card reader input and line printer output has
greatly speeded Sigma 2 software development. The loading of Sigma 2
programs is also much more convenient, since they can be stored on
the Sigma 5 disk and loaded exactly as Sigma 5 programs. It seems
highly desirable to have an assembler for any small data-acquisition
computer capable of running on another machine; the means of
transporting the object code to the small computer is of less
importance.

The reliability of the new equipment has been excellent. Only the
card reader has had any downtime of consequence, and modifications
seem to have resolved its problems. The Sigma 5 main frame has had no
failures in 12 months, and the Sigma 2 has had only one in the past
year. If this record continues, the loss of the redundancy inherent
in the old 910/925 system will not have any serious effects.


6. Computer-Independent Data Bus System

One component of the new system is taking on an increasingly
important role, although it had not been a part of the original
planning. That is the computer-independent data bus consisting of
system controller, bin controller, and register units. Only the
system controller is specific to a particular computer; moreover the
same system controller design could be used on both the Sigma 2 and
Sigma 5 by restricting the data path to 16 bits. The register units
are used to interface external devices to the computer quite cheaply;
a typical register used here to interface an existing Calcomp plotter
to the new computers costs about $300 in parts and labor. Similar
units are used to interface the Sigma 5 to the Sigma 2 and to the
910, to drive a temporary core-resident display on the Sigma 5, to
read pushbutton inputs, and to read ADC's. The display disk
controller now under construction uses these registers to furnish
control information, although the data go directly to and from the
core.

At the present time, the registers are read and written under
program interrupt control, but the design is not limited to
program-controlled operation. By substituting a controller designed
to operate automatically (directly to core or to the I/O processor)
speeds approaching 1 or 2 µsec per word transferred could be
obtained. Such interfaces have been built for various computers using
the European CAMAC bus system, which is conceptually similar.

The system is highly modular and is built into NIM bins with modified
back connectors. Exchange of modular units has been very helpful in
debugging the system, and presumably it will also be helpful in case
of failures in operation. This is a much more satisfactory situation
than that which was obtained with the ADC interface on which RB
collaborated with Brookhaven. The latter unit was built with
computer-type construction: commercial logic cards and wire-wrapped
back panel. Debugging of that unit was exceedingly laborious because
of the lack of modularity in its components.

The computer-independent bus system has not been expensive in
manpower. It has required about 9 man-months in design and debugging
and somewhat less time in construction. The registers cost about
$300, as mentioned, and the controllers $1500 to $2000 depending on
the need for cable drivers.


7. Costs

The costs of the RB multiple-computer system are given in Table 6.
The figures are approximate and not the result of detailed
accounting.

  TABLE 6 Systems Costs of Rutgers-Bell Multiple-Computer System
  ---------------------------------------------------------------------
  a.  Original 910/925 system
        Systems/programming                  1 man-year
        Interface design            910      6 man-months
                                    925      3 man-months

      Interface construction        910      $ 15,000 including display
                                    925      $ 11,000

      Computer costs                910      $ 3,500/month; bought
                                               with rental allowance
                                               for $58,000
                                    925      $ 4,800/month; including
                                               line printer
                                               and card reader

      Maintenance and updating      910      1 man-year, over 6 years


  b.  New system (including some components not yet acquired)

      Planning and expediting                1 - 1/2 man-years

      Systems programming                    3 man-years to date,
                                               2 more expected

      ADC interface
          Engineering design                $ 20,000
          Construction and test                9,000 spent outside
          Parts                               11,000
          Time spent locally                9 man-months

      Data bus system
          Parts                             $ 5,000
          Design and debug                  9 man-months
          Construction                      6 man-months

      Display disk system
          Disk with 64 heads
              and amplifiers                $ 24,000
      Interface to Sigma 5,
          Sigma 2, and displays             $ 10,000 (estimated,
                                               since design is
                                               not complete)

      4 14-in. displays with analog
        rotators and light pens             $ 12,000

      Three teletypes                       $ 5,000

      Miscellaneous technical work          1 man-year

      Computer costs
         Sigma 2                            $ 50,000
         Sigma 5                            $440,000 purchase
                                               equivalent, but
                                               part is leased

          TOTALS FOR NEW SYSTEM

              CASH COSTS                     $586,000

              TIME                           8 man-years professional
                                             3 man-years technician
  ---------------------------------------------------------------------


G. A PROCESS-CONTROL SYSTEM: THE BROOKHAVEN MULTIPLE SPECTROMETER
CONTROL SYSTEM (MSCS)


1. Introduction

In 1965, a system based on an SDS 920 computer was put into operation
at the Brookhaven National Laboratory to control data-acquisition
processes involving eight neutron spectrometers and one x-ray
spectrometer. The neutron spectrometers are located on the floor
surrounding the High Flux Beam Reactor (HFBR); the x-ray spectrometer
was placed in the same building in order to facilitate linking it to
the computer. The system can control the execution of experiments on
all nine sets of apparatus simultaneously, yet each experimenter
feels that he is working essentially independently of all other
users. The system controls all angular rotations of crystals and
counters, all detector counting, the data displays, the input and
output operations, and automatic error responses.

It can also perform most of the calculations necessary for real-time
guidance of the course of the experiments. For example, the
experimenter can mount a crystal on a goniometer at approximately the
correct angular orientation, then he can specify to the computer
where several peaks should be found, whereupon the computer will
direct the execution of a trial experiment to find where the peaks
do, in fact, occur, executing least-squares calculations in the
process, after which the error in crystal orientation is known and
the angular scales are automatically corrected. In another example,
the computer is given as input information the crystal constants
(unit cell) and the zone orientation of the crystal on the goniometer
and is asked to produce a scanning of a given part of reciprocal
space. The computer then calculates where to look, turns to a correct
angle to check the intensity of a central peak, and performs the
other necessary steps, making many decisions as it controls the
execution of the entire experiment.


2. Description of System

When it was first assembled, the system included only two teletypes,
both located near the computer. Early in 1969, a communications network
was added to permit the installation of a local, assigned typewriter at
each of the nine spectrometer stations, as well as three assignable
remote teletypes located in the Chemistry and Physics buildings. This
network incorporates a Varian 620i computer. It permits any ordinary
operation to be carried out from any of the 12 remote stations, except
program loading, which still must be done via the high-speed paper-tape
reader at the computer.

[Illustration: FIGURE 10 The multiple-spectrometer control system at
Brookhaven National Laboratory.]

[Illustration: FIGURE 11 Block diagram of a single-spectrometer
control station of the MSCS shown in Figure 10. [From D. R. Beaucage,
M. A. Kelley, D. Ophir, S. Rankowitz, R. J. Spinrad, and R. Van
Norton, Nucl. Instrum. Methods _40_, 26 (1966).]]

The major parts of the system (Figure 10) are the SDS 920 computer
with a 16k, 24-bit memory, a bulk storage memory section comprising
two magnetic tapes units and one 32,010-word drum, the communication
network, and the nine local control stations (SCS) at the
spectrometers. Each SCS (Figure 11) contains the stepping motors
required for computer control of angular rotations of crystals and
counters, together with shaft rotation encoders (optional,
incremental type) to feed information back to the computer. Each SCS
also includes manual controls, the electronic counters associated
with the radiation detectors, counter displays, a decoding and
control section, and other related equipment.


3. Lessons from Operating Experience

a. The system now does "all things imagined to be necessary."

b. The computer has proved to be remarkably reliable, with a record
of about 40,000 hours of use without a breakdown.

c. A reasonable amount of preventive maintenance is done, mostly
during the one week of four that the reactor is shut down.

d. One person serves as operator and programmer (for simple jobs). He
also transports magnetic tapes to the computing center for off-line
data processing and performs smaller tasks. The average user does not
need to do any programming.

e. Fortunately, the people who have written most of the programs have
remained in attendance and have updated the programs frequently.
Machine-language programming has not proved to be a bad chore because
the system is a fixed-hardware setup.

f. Modes of data collection can easily be changed.

g. The overall performance is excellent. The only problem is an
occasional wiping out of a program due to the fact that there is no
hardware memory-protection feature in the computer. These accidents
are estimated to cost at most a loss of a few percent of the running
time.


4. Costs

The costs in manpower and dollars of the MSCS are given in Table 7.

  TABLE 7 Cost in Manpower and Dollars of MSCS
  -------------------------------------------------------------

  a. Engineering Design and Costs (Professional Only) over 12
     Calendar Months

                                      Man-Months       Cost
                                      ----------       --------

     Electronic equipment
         Development, design,
         construction, and
         startup                         15            $ 28,000
     Mechanical development and
         liaison                          4               7,000
     System coordination,
         development, design,
         coding, etc.                    30              56,000
     Parameter generating, data
         analysis, and programming       15              28,000
                                        ----           --------
                            TOTAL        64            $119,000

  b. Construction Time and Costs (Technical) over
  16 Calendar Months

                                      Man-Months       Cost
                                      ----------       --------

     System construction and
         interconnection                 15            $ 17,000
     Debugging and startup                6               7,000
     Documentation and
         drafting                        12              14,000
                                        ----           --------
                            TOTAL        33            $ 38,000


  c. Major Components

                                           Cost
                                          ----------
      Original cost
      SDS 920 (16k mem.,
          96 interrupts)                   $147,000

      15-kc mag. tape and controller        20,000
       1 add'l. 15-kc tape                  15,000
      Magnetic drum memory                  36,000
      9 Spectrometer control stations       86,000
      Off-line paper-tape pre. unit          5,000
                                          ----------
                                  TOTAL   $309,000

  Replacement: The major components of the MSCS cannot be
  replaced by new line units as they are no longer in production.

  d. Operating Costs

     Normal use                           Per Year
                                         ---------
     Computer operator/programmer         $ 11,000
     Computer maintenance                   12,000
     Materials                               4,000
     Misc. (minor system improvements)      10,000
     Overhead                                5,700
                                         ---------
                                TOTAL     $ 42,700

     Manpower required
     Computer operator/programmer            1
     Systems programmer (as required)        1
     Maintenance personnel (part-time)       2

  Note: All manpower with the exception of the on-call systems
  programmer has been costed in a above.

  e. MSCS Communications Network

  The Communications Network adjunct to the MSCS was started
  October 1967, and it became operational early in 1969.

                                               Man-   Calendar
                                     Cost    Months    Months
                                     ------- ------   --------
         1. Engineering design
            and programming          $25,000     10      12
         2. Components (commercially
            available)                50,000     -        -
         3. Construction               6,000     4.2      7
                                     ------------------------
                          TOTALS     $81,000    14.2     19
  -------------------------------------------------------------


H. RELATIONSHIP TO A REMOTE COMPUTING CENTER


1. The Small Computer with a Fast Data Link to a Remote General
Computing Facility

Although the use of a small data-acquisition and experiment-control
computer on-line to a remote computing center machine is not uncommon
in high-energy particle physics applications, we know of few such
systems presently operating in low-energy nuclear physics.

For the purposes of this discussion, we define "general computing
facility" to be a relatively large-scale centralized installation
charged with the responsibility of servicing a wide range of
computing needs. The typical university computing center is our model
for such a facility.

In light of the fact that only a few years back the remote computer
on-line to a general computing facility was considered to be the wave
of the future, with plans for such systems under vigorous discussion
at many low-energy physics installations, it is at first sight
surprising that there is so little progress to report at this time.
The Van de Graaff accelerator laboratory at the State University of
New York at Stony Brook was one such facility planning to couple a
PDP-9 on hand to an IBM System 360/67 available at the university
computing center. It is instructive to examine what happened there.
In 1967, with the completion of the new accelerator scheduled within
a year, it was decided that the best way to acquire the desired power
and flexibility in computing support was through a coupled system of
the kind under discussion. Plans were formulated for a high-speed
transmission line to a control unit on a selector channel at the
computer center. Since true time-sharing of the System 360/67 was not
in the offing, a 128k-byte partition of high-speed core storage was
to be permanently dedicated to the needs of experimental physics
(including the particle-physics group), and a high-speed
program-swapping drum and at least one tape drive were to be assigned
to the physics users as well.

What actually happened was that as funds became available to the
low-energy physics group to implement its share of the remote link to
the computer center, sentiment shifted to the point of view that the
funds could more usefully be invested in a second PDP-9 installed at
the accelerator, and the second small-to-intermediate class computer
was in fact purchased. The two PDP-9's are coupled only by a
switchable tape drive, with no plans at present for direct
channel-to-channel communication. Plans for a remote link to the
computing center have been completely dropped; any further funds for
computing will be invested in larger high-speed core stores for the
PDP-9's, at least in the foreseeable future.

Conversations with the principals involved in the operation of the
Stony Brook low-energy physics facility fail to yield a clear and
uniform explanation of the change in computing outlook. One cannot
escape the impression that the group was not wildly enthusiastic
about the proposed remote linkup in the first place, and that the
evident immediate benefits to the group of a second PDP-9 on hand for
program debugging and experiment setup while the second machine was
running an experiment were irresistible when compared to the future
promise of a remote link to the IBM 360/67. The physicists were not
anxious to undertake what was expected to be a substantial systems
program development task for the coupled system, being unconvinced
that the result would be worth the effort. While they still wish to
increase the computing power available to them on-site, they have
elected to achieve that end by expanding high-speed core storage on
their machines, at least until true time-sharing becomes available at
the central computing facility.

The coupled system at the University of Manitoba cyclotron is
representative of what was intended at Stony Brook. At that
installation, the PDP-9 is linked to the computing center's IBM
360/65 by a control unit commercially available from DEC for about
$15,000. The unit connects the PDP-9 (or its successor, the PDP-15)
directly to a System 360 selector channel, without requiring an
additional control unit. The maximum data-transfer rate at Manitoba
over a 2000-foot twisted pair cable is 50k bytes/sec. A relatively
unsophisticated set of system programs has been written to control
communication and transfer of data between the two computers.

The only experiment to which the coupled system (as distinct from the
stand-alone use of the PDP-9) has been applied is a p-p
bremsstrahlung measurement, where the data are developed in wire
spark chambers and plastic scintillation counters. Information from
the wire chambers defines proton trajectories, and pulse heights from
the counters determine their energies. The PDP-9 first tries to
reconstruct a vertex from the proton trajectories. If a point of
origin can be determined for the protons to the required accuracy,
the relevant coordinates for the proton trajectories and the pulse
heights are sent to the IBM 360/65 for full kinematic and statistical
analysis of the individual event; otherwise, the event is rejected.
The large computer also prepares displays and plots of physical
interest that are returned to the PDP-9 for display on the local CRT
or output on the local _x-y_ plotter.

The remote computer operates in a multiprogramming rather than in a
time-shared environment, with an assigned partition of 65k bytes.
Because of the well-designed program overlay feature of the 360/65
operating system, the Manitoba group does not find itself restricted
by this relatively small partition. Because of other demands on the
computing center, however, they are restricted in the use of this
partition to 16 hours/day and 5 days/week. The operation of the
coupled system is controlled almost entirely from the PDP-9 teletype,
with 360/65 operator intervention required only for initial loading
of the partition, off-line printout, and, of course, mounting
magnetic tapes at the computing center.

Users of the Manitoba system are pleased with the cooperation and
service they have received from the computing center thus far, and
they are anticipating no difficulties developing as their demands on
the central computing facility increase. But while use of the coupled
system for experiments other than that described is clearly possible
and desirable, no information was available on plans for the future.

The Brookhaven on-line remote network (Brooknet), where a pair of CDC
6600 machines sharing a common one million _word_ extended core
storage unit may be interfaced over a high-speed channel to as many
as 64 remote data-acquisition computers, can be considered an extreme
example of a coupled system. Although the software for Brooknet is
reported to be complete and debugged, the system has not yet begun
routine operation, and the first remote computer intended for
low-energy physics application (a PDP-15) has not yet been delivered.
(The only Brooknet user at present is the Chemistry Department, which
has a remote batch terminal: teletype, card reader, and printer.)


2. Reasons for Lack of Popularity

Why has linking data-acquisition computers directly to computing
centers not proved as popular as the obvious advantage of having
access to an extremely powerful computer would lead one to expect?
There are a number of contributing factors:

1. Since the remote computer can be used only if it is in operating
condition and if the necessary personnel are present, the physicist
stands to lose some of his independence and flexibility of operation
(often not four-shift operation).

2. Most remote computers operate on a multiprogramming basis, hence
prompt interrupts are not available. The waiting time for attention
might typically be several tenths of a second, therefore the computer
in the physics laboratory should be fairly powerful in order to
handle the preliminary processing and buffering. With such a computer
at work the necessity for fairly rapid access to the large remote
machine may entirely disappear, or else the experimenter may be able
to store partly processed data on magnetic tape for subsequent
further reduction off-line at the computing center.

3. The total amount of time available to one user of a shared-time
system per day is always limited. The amount of access time
guaranteed by the computing center may not be sufficient.

4. In some cases there is a question of charges, and the total
expense of involvement with the computing center may be comparable
over a period of several years with the extra cost of buying a
sufficiently large local computer for the laboratory to be able to
handle all the essential on-line calculations. Even though the
calculations may take longer in terms of machine time, they may not
require as much lapsed real time if there are stringent limitations
on computer center access time.



Chapter 3

A REVIEW AND ANALYSIS OF EXPENDITURES


In this chapter we present a review and an analysis of total
expenditures for on-line computing in a large number of laboratories
supported by the Atomic Energy Commission and the National Science
Foundation through 1968. (Appendix B gives the background for this
economic survey.)


A. THE NATURE OF THE DATA

Laboratory directors were requested to supply a separate report
covering each data-acquisition system currently in use or under
construction and, in addition, to supply an estimate of anticipated
future requirements for the period 1970-1974. The high-energy field
was excluded. Information was also requested on process-control
applications, e.g., systems to control accelerator operation or to
monitor progress and to execute control functions during the course
of an experiment. In every case details were to be supplied regarding
the nature and capability of the system and its cost in dollars and
manpower during the design, construction, and operation phases.

In all, 46 different systems were reported by 22 different
institutions (listed in Appendix B). Berkeley, Brookhaven, and Oak
Ridge together reported 21. The various systems range in total cost
(including manpower) from about $40,000 to about $1,000,000. Most are
in operation, but a few are under construction, and a few others are
in the advanced proposal or design stage. Plans for 16 substantial
expansions and proposed expansions of existing systems were also
reported. There was a wide range of thoroughness of compliance with
the request; for example, cost estimates ranged from the most
meticulous analyses down to one case where no cost information
whatever was supplied. In assessing the reliability and completeness
of the data the reviewer concluded that in general the costs of
manufactured hardware items such as central processors (CPU's), line
printers, card readers, rotating memory devices, etc. should be
regarded as reasonably accurate, while estimates of the amount of
manpower used, and its cost, seemed much less reliable; in fact, the
manpower item was frequently not covered, especially in connection
with the preparation of systems software. Whenever a report was more
or less complete, and there seemed to be a reasonable good basis for
doing so, the reviewer estimated appropriate values for missing items
by making use of figures given in more complete reports on similar
systems constructed or operated under similar circumstances.

[Illustration: FIGURE 12 Breakdown of system for analysis.]

With regard to labor costs, government laboratory people seem to be
in a much better position to supply figures than are university
people. The reviewer got the impression that the university
respondents have, on the average, a much less clear idea of the
dollar value of people's time and a much less clear idea of how to
estimate realistically the man-hours consumed by various projects.


B. BREAKDOWN OF DATA FOR ANALYSIS

Because of the nature of the data the reviewer separated each system
into three parts for the purpose of analysis: (1) the data-acquisition
central processor (CPU); (2) the standard computer input-output (I/O)
devices such as magnetic tapes, disks, card readers, printers; (3)
the complete data-acquisition subsystem (DAS). (See Figure 12.) This
breakdown has the advantage that the costs of the first two parts
of the system are usually fairly accurately known. The cost of the
DAS includes the price of all manufactured units closely involved in
its assembly, including scalers, ADC's, pulse-height analyzers, and
the like (but not detection equipment), together with the expenses
associated with all special construction, including engineering,
fabrication, and parts. All engineering and fabrication costs
associated with the entire system can logically be charged against the
DAS, because the CPU and I/O parts, being assembled from standard
manufactured items, generally are installed by the manufacturer without
much effort or expense on the part of the laboratory personnel.
Questions occasionally arose in connection with the assignment of the
cost of interfacing the DAS to the CPU. Such costs were assigned to the
DAS when the units involved were of a custom-built nature and to the
CPU when they were manufacturer's items incorporated in the computer
frame. The very wide range of types of data-acquisition equipment
in use necessarily contributes to the spread in DAS costs. Although
a number of items of uncertain costs are lumped together in this
definition of the DAS, the procedure adopted is believed to have led to
a valuable overall picture of the pattern of expenditures.

  TABLE 8 Types of Computers Used in the Systems Reported
  -------------------------------------------------------

  Type            Number
  -------------------------------------------------------

  ASI 210         1
  ASI 2100        2    (3)

  CDC 160A        2
  CDC 3100        1    (3)

  DDP 116         1
  DDP 124         1    (2)

  EMR 6050        1
  EMR 6130        1    (2)

  IBM 1800        2
  IBM 360/44      2
  IBM 7094        1    (5)

  PDP-4           2
  PDP-5           1
  PDP-6           1
  PDP-7, 7A       6
  PDP-8, 8I       8    (24)
  PDP-9           6

  SCC 660         1    (1)

  SDS SIGMA 2     1
  SDS SIGMA 5     1
  SDS SIGMA 7     2
  SDS 910         1     (8)
  SDS 920         1
  SDS 925         1
  SDS 930         1

  SEL 810B        2
  SEL 840A        1     (3)

  Varian 620I     2     (2)
                 ---
  TOTAL          53
  -------------------------------------------------------

A fourth item of importance in the analysis is the cost of system
software programming. This is almost entirely a manpower item,
assuming that program testing and debugging can be carried out
without charge for the computer time involved. Here there is
considerable uncertainty in the estimates, especially with respect to
university installations as well as systems which have been in
operation for a long time, e.g., the large system at Argonne.

The total cost of a system is taken to be the sum of the four items
listed above, namely, the CPU, the standard I/O system, the DAS, and
the system software expenditures. In all likelihood the total costs
tend to be too small rather than too large because of incomplete
assignments of charges of various sorts, especially manpower. In many
cases the totals seem reliable to 10 or 20 percent, while in a few
others an error of 30 or even 40 percent would not be surprising.


C. TYPES OF COMPUTERS

Table 8 gives a listing of the 27 different types of computers
incorporated in the systems reported, together with the number of
units of each type mentioned. Of the 27 types, 24 are machines
designed with this general sort of application in mind; the
exceptional three are the CDC 160A, the CDC 3100, and the IBM 7094.
Evidently, the PDP machines are the most popular (24 units), followed
by SDS types (8 units), and IBM types (5 units).


D. SOME TOTAL COSTS

Of the 46 system reports, 35 were sufficiently complete to be useful
in a detailed analysis. A histogram showing the distribution of these
in total cost is given in Figure 13. One immediately sees that few
systems cost less than $100,000; in fact only four were reported in
this range. However, it must be pointed out that information was
solicited regarding only those systems which had cost approximately
$50,000 or more. The most common range is $100,000 to $200,000, with
12 examples. The total cost of the system at the Yale Van de Graaff
laboratory was not known when the histogram was prepared, but the
hardware is reported to cost about $750,000 to duplicate and about
$655,000 to copy, so if allowance is made for the cost of developing
the software and for other manpower uses the cost would rise
substantially. (This system is not one of the 35. The conditions
under which the Yale-IBM development are being carried out are so
special that manpower costs cannot be assigned on the basis used in
other cases. See Chapter 2, Section E.)

[Illustration: FIGURE 13 Histogram showing the distribution of 35
data-acquisition systems in total cost.]

A breakdown of total costs for the 35 systems is given in Table 9,
showing separately the total amounts involved in each of the four
categories defined above. Evidently, about 60 percent of the cost
goes for standard computer hardware, while about 40 percent goes for
special hardware and software required for data acquisition. Table 10
shows separately the hardware and labor costs in the DAS item.
Evidently, hardware is twice as expensive as labor in this case, on
the average.

  TABLE 9 Summary from 35 "Complete" Reports
  ----------------------------------------------------------

                                                  Percentage
  Subsystem                       Cost            of Total
  ----------------------------------------------------------

  CPU's with memory
    and TTY                       $ 3,933,000     38.5
  Standard peripherals              2,293,000     22.4
  Data-acquisition
    subsystem                       3,038,000     30.0
  Systems software                    931,000      9.1
                                  -----------    -----
                 TOTAL            $10,195,000    100.0
  ----------------------------------------------------------

  TABLE 10 Data-Acquisition Subsystem
  ----------------------------------------------------------

  Hardware               $2,022,000
  Labor                   1,016,000
                         ----------
                TOTAL    $3,038,000
  ----------------------------------------------------------

[Illustration: FIGURE 14 Cost of standard peripheral equipment
plotted against central processor costs for 36 systems.]

[Illustration: FIGURE 15 Cost of data-acquisition subsystem plotted
against central processor costs for 36 systems.]


E. BREAKDOWN OF COSTS BY SYSTEMS

In Figure 14 the cost of the standard I/O equipment is shown plotted
against the cost of the CPU for 36 different systems. The high point
labeled "T" represents a system having many high-speed magnetic tape
drives. The low point labeled "R" represents the Rochester system,
which must be considered unbalanced, because its only "standard" I/O
equipment is four Dectapes, which should, perhaps, have been defined
as CPU items, since they cannot be used for communication with most
computing centers. If a line printer and two IBM-compatible tape
units were added, the Rochester point would have to be raised at
least as high as the position R'. The straight line shown in Figure
14 was drawn with a slope of one half. It may perhaps be taken to
represent a rough statistical reflection of the collective experience
accumulated over the past six years or so regarding the relative
costs of I/O and CPU equipment. In Figure 15 DAS costs are plotted
against CPU costs for the same 36 systems. Here the spread of the
points is worse than in the previous case, as expected for the
reasons mentioned earlier. The exceptionally high point labeled "PHA"
represents a system with three large pulse-height analyzers, two of
them 20,000-channel units, in the DAS. The straight line shown has
the equation _y_ = 8.0 + 0.7_x_. The overall DAS cost is 77 percent
of the total CPU cost.


F. ROTATING MEMORY DEVICES

One magnetic drum unit and 11 disks were reported to be in service
(in eight different laboratories). Plans were reported for the
installation of six more disk units and one drum (in five different
laboratories). Recognition of the importance of rotating memory
devices in display applications is evident in the reports.


G. SYSTEMS ON-LINE WITH COMPUTING CENTERS

Two systems were clearly stated to be in successful on-line operation
with external computing centers. (At least one more example, at the
University of Manitoba, is known: there a PDP-9 system is linked to
an IBM 360/65.)

There are plans in various stages of development to connect nine
different data-acquisition systems on-line with computing center
machines, in most cases to operate on a delayed-access basis.


H. ANTICIPATED FUTURE EXPENDITURES

In cases where updating or enlarging of existing systems was said to
be in progress, the costs reported were usually assigned by the
reviewer to the present system, especially when money for the
expansion seemed already available or very likely to become
available. In many cases plans were in a less advanced state, but a
fairly definite idea of the amount of money to be requested for
expansion or for completely new systems was expressed. Table 11
summarizes these anticipated costs.

  TABLE 11 Anticipated Future Expenditures
  ------------------------------------------

  For expansion of systems        $3,280,000
  For additional systems           1,455,000
                                  ----------
                 TOTAL            $4,735,000
  ------------------------------------------


I. INVESTMENT IN ACCELERATORS, COMPUTER SYSTEMS, AND LABORATORY
BUDGETS

C. V. Smith and George Rogosa have kindly made available approximate
AEC budget figures for nine typical university laboratories chosen
from those which had returned information in response to Dr.
McDaniels' request. (The laboratories are Colorado, Kansas, Maryland,
Minnesota, Texas, Wisconsin, Washington, Yale Linac, and Yale Van de
Graaff.) After adding similar information for Rochester, it was
possible to get a rough idea of the relative capital investments in
accelerators and in computer systems and to compare those figures
with the annual operating budgets (for 1969).

  total annual budget
  ------------------------  =  0.33
  cost of bare accelerator


  total computer cost                   0.22 ± 0.06 by averaging
  ------------------------  =  0.23 ->  separate ratios for each
  cost of bare accelerator              system


  total computer cost
  ------------------------  =  0.70
  total annual budget

If the ratio of the total computer cost to the annual budget is
calculated for each of the ten cases, and then the results are
averaged, one gets 0.6 ± 0.3. If one quite unusual set of data (from
a laboratory with a small AEC budget) is eliminated the last result
becomes 0.56 ± 0.21, while the earlier results remain essentially
unaltered. For the same nine examples we find that the average of the
ratios of total computer system costs to bare accelerator costs is
0.22 ± 0.062, thus this ratio is significantly more consistent. It is
emphasized that the results given in this paragraph refer only to
experience at universities.


J. PROCESS-CONTROL APPLICATION

Tables 12 and 13 give a summary of present and anticipated
process-control applications disclosed by the survey.


  TABLE 12 Current Process-Control Applications
  -----------------------------------------------------------------

  Laboratory            Systems
  -----------------------------------------------------------------

  ANL                   Van de Graaff accelerator; large
                          scattering chamber setup; x-ray and
                          neutron diffractometers; automatic
                          plate scanner
  BNL                   Neutron spectrometers; x-ray and neutron
                          spectrometers, nine in all
  Michigan State        Cyclotron shim coils
  ORNL                  Slow neutron time-of-flight to measure
                          capture and fission cross sections
  Yale                  Electron linac and beam optics; experiments
                          with the linac
  -----------------------------------------------------------------


  TABLE 13 Future Process-Control Applications
  ----------------------------------------------------------

  Laboratory            Systems
  ----------------------------------------------------------

  Michigan State        Control of entire accelerator system
  Minnesota             Tandem Van de Graaff accelerator and
                          beam transport system
  Stanford              Nuclear reaction experiments
  UCLA                  Limited control of cyclotron
  ----------------------------------------------------------



Chapter 4

SUMMARY AND RECOMMENDATIONS ON SYSTEM PLANNING


A. THE NEED FOR ON-LINE COMPUTER SYSTEMS

The ultimate justification for assembling and using on-line
data-acquisition systems must be made in terms of research output.
The same considerations underlying judgments on the support of
experimental research in other ways must therefore apply to computer
systems. Some reasons often given for the use of on-line computer
systems are these:

1. Modern experiments produce vast quantities of data which can be
handled efficiently only by automatic calculating machinery. The
experimenter gains greatly in effectiveness when the data are
immediately converted into machine language, reduced by the computer,
and presented to the experimenter in a convenient form.

_Comment_: Undoubtedly true. Fortunately a small system can satisfy
this requirement in many cases.

2. Some experiments "cannot" be done by other means.

_Comment_: More likely true in practice than in principle.

3. Investment in a computer system is sometimes sound because it
leads to a net reduction in the overall cost of performing
experiments, either by eliminating some of the labor cost, by
reducing the consumption of accelerator time, or in some other way.

_Comment_: True in many cases. Making estimates of projected savings
is easier in _ad hoc_ cases than in general.

4. Having facilities immediately accessible for calculating
nuclear-reaction kinematics, magnetic analyzer field strengths, and
other phenomena during the course of experiments saves time and
promotes efficiency.

_Comment_: True, however, much of this work can be done ahead of
time, and much of it requires only a relatively short, simple
calculation which can be executed on a medium-sized computer,
sometimes on a small one.

5. Given a sufficiently large computer system in the laboratory, its
use for complicated data reduction and for theoretical calculations
may produce an important saving of funds which might otherwise have
been spent at the computing center.

_Comment_: This point may sometimes be valid, depending on a number
of conditions, but the installation of a large computer as part of
the data-acquisition system essentially on the basis of this argument
is questionable, in view of the excellent facilities offered by
modern computing centers.

6. Some expense for the _development_ of computer systems and
computer systems methods is justifiable as an investment in
methodology.

_Comment_: True, although there is some question about the choice of
places where such work should be done and about the correct source of
funds to support it.


B. WHERE SHOULD LARGE-SCALE CALCULATIONS BE DONE?

At the very outset of planning one should examine very closely the
question of the large-scale calculating required in the overall
execution of the research program of the laboratory; then, if, as
usual, it turns out that a substantial amount of complex calculating
is anticipated, one should consider carefully the feasibility of
planning to do that part of the work at the most readily accessible
computer center in the vicinity, so as to be able to concentrate
one's own energies and resources, especially capital investment, on
the data-acquisition system. The use of a modern computer center
offers enormous advantages, and most computing centers would welcome
support. If this course of action is chosen, provisions must be
planned from the start for computer-language communication between
the computer center and the nuclear research laboratory via a medium
such as magnetic tape. (Direct wire transmission will often not prove
feasible.)

Some key questions are:

1. How much large-scale computing is anticipated?

2. How much waiting time for results is tolerable?

3. Can the local computing center handle the needs, and at what cost?

4. If the local computing center can handle all the needs, but only
after acquiring certain additional support for equipment or manpower,
might not the better course of action be to provide that support
rather than to set up separate facilities?

5. Can setting up a large system truly be justified? Have all the
extra costs and complexities of the large system been taken into
account, including those associated with input and output devices,
operation, maintenance, programming, management, and space?


C. EXERCISING ECONOMIC JUDGMENT IN PLANNING

Since the ultimate criterion is research output, the role assigned to
a computer system must depend on the nature of the work being
planned. In some cases where a very specific use is intended, for
example, in the case of a process-control application such as the
Argonne plate scanner or an accelerator controller, the conditions
are simple enough to make economic judgment relatively easy to apply.
In the case encountered in setting up an accelerator laboratory where
a wide variety of experiments is to be performed, conditions are much
more complex. It is now widely accepted that any such laboratory
should have a computer system, but what is not so clear is how
extensive and expensive it should be. In other words, points 1-4 in B
are accepted, and point 5 is conceded possibly to be applicable.

If sufficient funds are available, one sensible way to proceed is to
use the accumulated collective experience outlined above. For
example, one can say that experience has shown that the total
investment in the computer system will be in reasonable balance with
the capital investment in the bare accelerator if the ratio of costs
is about one to five. Departures from the rule may then be made to
adjust to special circumstances. Following this procedure means
extrapolating from past experience, which may not prove a good guide,
but this approach is similar to that often used in other matters
bearing on the support of research. Probability is involved. It
should be noted that the actual expenditures for on-line equipment
for nuclear research have far exceeded those projected at the
"Grossinger Conference on the Utilization of Multiparameter Analyzers
in Nuclear Physics" in 1962.

In times of economic stringency it may be necessary to take a hard
look at points 3-5 in B above before deciding how large a computer
can be justified. A medium-sized computer is sufficient for most
data-acquisition demands but not for large-scale calculations of a
theoretical nature or for an occasional complicated piece of data
reduction. Often it will be advisable to plan on carrying out all
large calculations at the computing center, in which case a
medium-sized computer will probably suffice for data acquisition, and
a saving of about half in capital investment and operating expenses
can be achieved.


D. ON THE UTILITY OF SMALL AND MEDIUM-SIZED COMPUTERS

If economic realities and good judgment should dictate the choice of
a smaller system, the laboratory will still be well off. There is a
tendency not to recognize the full capabilities of modern
medium-sized and small computers, which, given intelligent
programming, are very powerful. Although programming is in general
expensive, the return for a modest amount of it in terms of
data-acquisition performance may be very impressive. For example, the
use of tables calculated ahead of time, stored on magnetic tape at
the computing center, and read into the data-acquisition machine
along with its control program offers a way to bypass the need for
various sorts of calculations which might have been done on-line on a
larger system. Increased efficiency of data acquisition often comes
from the use of such methods, reflected in increased data-handling
rates.


E. GROWTH CONSIDERATIONS

The system planner should try to anticipate a possible future
expansion. In the case of a cut-and-dried process-control application
it will often be safe to assume that the system will not have to
grow, but recent history shows that in the case of general-purpose
systems growth is the rule. In fact, systems have sometimes had to be
replaced by entirely new ones. The system planner must beware of
pitfalls. If, in anticipation of a greater future need, a much larger
CPU is ordered than current use demands, the anticipated need may not
develop. Or, if it happens that the money initially available for
capital investment is so limited that it is all exhausted in buying
the CPU, leaving the system badly short of conventional I/O
equipment, then the system will remain painfully unbalanced until
substantial additional funds appear. If those funds do not appear,
the capability of the system will remain far less than the presence
of the large CPU would suggest. (This is what happened at Rochester,
where three years after the system was installed there is still no
card reader, line printer, or conventional magnetic tape drive
system; in fact, there is no computer-language medium for
communication with the University of Rochester Computing Center.)

[Illustration: FIGURE 16 A data-acquisition system based on a
medium-sized computer. Prices are actual costs for equipment supplied
by a well-known manufacturer. This system is powerful enough to
satisfy most data-acquisition needs at a typical low-energy
accelerator laboratory.]

The correct strategy to employ in every case should be consistent
with the size of the laboratory and with the capabilities of its
staff. A laboratory with a small engineering staff and with modest
computing needs for the immediate future should certainly not plan to
set up a large system. Instead it could sensibly begin with a
manufacturer-assembled, trimmed-down version of the Comparison System
(Figure 16), which could be enlarged later as occasion demanded and
funds permitted.


F. SHORT SUMMARY OF CONCLUSIONS REGARDING SYSTEM PLANNING


1. Planning and Procuring a Data-Acquisition System Today

It is no longer necessary to develop one's own system. Times have
changed greatly. Many systems now exist which work well and are worth
copying. Manufacturers and suppliers are prepared to deliver entire
systems assembled and ready to operate, complete with all the
necessary system software and varying amounts of utility software.
Although it may at first sight seem more economical to assemble a
system within the laboratory, by use of laboratory personnel, in most
cases it is now better to buy the system from a single supplier,
completely installed and operable, saving one's own resources for
matters more directly concerned with research. The costs in time and
effort to develop a new computer system have been much larger than
predicted, in almost every case known to the authors. Large
laboratories having strong engineering staffs are an exception;
outside of industrial plants they are the places where new system
development and assembly makes the most sense.


2. Large-Scale Computations and Computing Centers

In general it is best to plan to do all very large-scale computing
jobs (e.g., shell model and scattering theory calculations) at a
large computing center and to set up in the laboratory a system which
is just large enough to handle comfortably the data-acquisition jobs.
Usually a medium-sized or small system will suffice. However, in some
circumstances this will not be true.


3. Remote Large Computing Center On-Line for Data Acquisition

Direct transmission-line coupling to a large, remote computing center
may prove practical for handling occasional low-priority bursts of
data processing, for example, when one can be satisfied with
guaranteed access within about 100 µsec, say, and a maximum
guaranteed total access duration of no more than a few percent of any
day. Such a hookup may also be valuable for the handling of data
input and output in the remote batch mode of operation, especially
if a card reader (or high-speed paper tape or storage device) and a
line printer are available for this use, in the laboratory. However,
there are few if any examples of successful high-priority
prompt-interrupt operation. One should be extremely skeptical about
the feasibility of relying on this last mode of operation.


4. Buying versus Renting

Rental rates have typically been set so that if the anticipated use
period exceeds about three years, economic prudence suggests
purchasing a computer rather than renting, providing that the
necessary funds for capital investment are available. This can only
be true, of course, because the life expectancy of modern computers
is quite long, certainly over five years. (Also, one hesitates to
trade in an old computer for which an excellent software collection
exists!) The argument against renting standard peripherals is weaker,
because they are electromechanical in nature and therefore have
shorter lifetimes; furthermore, they tend to become outmoded. Renting
can be especially attractive in special circumstances. For example, a
line printer can be rented for the early period of operation of a
system, while extensive program development work is in progress, and
returned later, when the work has been finished.


5. New Computer or Current Model?

Computers are rapidly getting better and cheaper. This month's
machine is much more powerful than last month's, dollar for dollar.
New machines will always be appealing, but the prospective purchaser
must balance their appeal against considerations of probable delivery
date, software availability, completeness of documentation for both
software and hardware, and in general the manufacturer's support
capability. Unfortunately, these factors usually weigh against a new
machine. As a rule, even a medium-sized system based on a new model
machine will not be in full operation for approximately one year
after delivery, unless both the hardware and the software have been
tried and proven in a previous installation. On the other hand, in
the case of an older model the same factors may all be favorable, but
now the machine probably gives less computing per dollar, and the
advantage of an early return on the investment must be weighed
carefully against the likelihood of somewhat earlier obsolescence. At
some time during the life of a computer the manufacturer will very
likely cease to support its software and, usually later, its
hardware.


6. Importance of Software

Software is all-important, and it is very expensive to develop, both
in time and money; hence a system planner should favor a central
processor for which a large amount of software is supplied by the
manufacturer, especially system software. In general, when a
particular type of machine has already been delivered to many
customers the manufacturer may be relied upon to supply the essential
software needed to run a system: an assembler, I/O routines for
standard devices, and usually a Fortran compiler. The larger machines
will be supplied with some sort of operating system (monitor), either
for batch or time-shared operation. However, the specialized software
needed for data acquisition will usually not be available unless it
has already been developed by another user. A laboratory with limited
programming resources should therefore give great weight to obtaining
a system already provided with all essential software and should
direct its own programming efforts to specific data-acquisition
problems. Contracting with an outside company for development of the
specialized software is also possible, although the cost will
probably exceed the salaries of in-house personnel hired to do the
same job, and communication with an outside group is inconvenient.


7. Utility of Modern Small Computers

Many small, powerful computers are now on the market. They are
inexpensive but very reliable. For many data-taking purposes they are
quite sufficient, when equipped with appropriate peripheral devices
and an adequate program library.


8. Utility of Disks and Drums

Magnetic disk and drum bulk storage devices have also undergone much
development recently. Many good, small versions are now on the market
at rather low prices. The capabilities of these units must not be
overlooked. Attaching a modern disk unit to a modern, small or
medium-sized computer produces a powerful but economical combination.


9. Need for Adequate Peripheral Devices

Unless an appropriate set of standard input-output devices is
provided, the computer will not be used efficiently. A balanced
system with a small computer is likely to prove much more useful than
an unbalanced system with a medium-sized computer. What is necessary
will, of course, depend upon the uses of the system. For example, if
a large amount of program development is anticipated, the inclusion
of a line printer should certainly be considered, because universal
experience has shown that line printers are immensely valuable during
program development; on the other hand, as a rule they are not so
important in most data-taking operations.


10. Peripherals (Brand X)

It is often cheaper initially to use peripheral devices from a
separate manufacturer, with interfacing provided either by the user
or by an outside commercial firm. In this case difficulties lie in
guessing the reliability of the devices and in achieving software
compatibility. Software developed by a computer manufacturer usually
takes advantage of the peculiarities of his own peripherals. If an
outside device is purchased, the additional cost for programming
during the lifetime of the system should be considered. If competent
engineering effort is available, an interface compatible with the
computer manufacturer's software may be built, with a possible saving
in programming cost.


11. Input-Output Bus Structures

Standardized input-output bus structures designed to simplify
interfacing to computers have recently been developed. Conspicuous
among them is the CAMAC system already accepted as standard in many
European laboratories. It is now being introduced into a few American
laboratories. Before it can be accepted as a standard system here, a
number of questions must be answered. For example, what types of
external devices should be interfaced in this way, just ADC's data
registers, counters, and the like, or should line printers, card
readers, and related devices be included? Also, how much trouble will
be encountered with manufacturers' I/O software, and how much will
any necessary rewriting cost? Also will all computer I/O structures
lend themselves to such a system; specifically, are multiport systems
suitable? A national committee is now studying the CAMAC system to
see if it, or something similar, should be recommended as standard in
the United States. Even after being recommended as standard, however,
any such system cannot be considered successful unless manufacturers
accept it and market a wide variety of compatible devices. From the
manufacturer's point of view the risks here may seem considerably
greater than they were in the case of the NIM bins. It seems wise to
keep watching for the outcome of this interesting development.


12. Necessity for Competence in Machine-Language Programming

Whenever a new type of device is interfaced to a system, some form of
machine-language programming must almost always be done in order to
permit the handling of input-output operations involving the new
device. This is true even in places such as Yale, where the design
emphasizes a maximum use of Fortran. For this and other reasons,
there should be at least one person on call who is skilled in
machine-language programming and who understands the system.


13. Manpower for Programming and Maintenance

The manpower required to maintain the hardware and software of any
system naturally depends on the size of the installation and the
uses to which it is put. Typically, a continuing effort must be
expended on the improvement of system software and the writing of
new data-acquisition programs. The existing hardware must be given
preventive maintenance and repairs. Furthermore from time to time
a hardware change must be made. Also, there are administrative
matters; even the smallest system should have within the laboratory
at least one person who will devote a large part of his time to
administration, to the education of users, and to related matters.
In many cases the laboratory has a contract with an outside firm,
often the computer manufacturer, for maintenance of the computer,
and sometimes the rest of the system as well. In other cases all
or part of this work is done by laboratory personnel. Sometimes
several laboratory people are competent both in machine-language
programming and in diagnosing and repairing hardware ills. Such
people are very valuable, especially if they are also competent to do
interfacing of new devices. In some cases the experimenters do much
of their own data-acquisition programming, in others essentially all
programming is done by professionals. In some university laboratories
much use is made of part-time student programmers, of whom there
is now a considerable supply because of the growth of education in
programming, both in high schools and at colleges. Students are
sometimes remarkably good at this work and stand to profit later
from the experience, but they are transients, and effort expended
in training them is lost when they leave. Very roughly speaking,
a small system will require a good fraction of the time of a
technician-programmer, a medium system will require at least one
full-time technician-programmer, and a full-time programmer, or some
equivalent combination, assuming an active research program.



Appendix A

TABLES OF PROPERTIES OF SMALL AND MEDIUM-SIZED COMPUTERS


The comprehensive tables of properties of small and medium-sized
computers appearing on the next 6 pages are from D. J. Theis and L.
C. Hobbs, "Mini-Computers for Real-Time Applications," _Datamation_,
Vol. 15, No. 3, p. 39 (March 1969) and are reprinted here by
permission of the publisher, F. D. Thompson Publications, Inc., 35
Mason Street, Greenwich, Conn. 06830.

  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
                                      Digital      Digital                                                 Data Mate      Decade    Electronic
                                      Equipment    Equipment     Computer    Control Data  Data            Computer       Computer  Assoc.
                                      Corp.        Corp.         Automation  Corporation   General         Systems, Inc.  Corp.     Inc.        EMR          Hewlett-Packard  Hewlett-Packard  Hewlett-Packard  Honeywell
  MANUFACTURER/MODEL NUMBER           PDP-9        PDP-9/L       PDC-816     1700          Nova            Data Mate-16   70/2      640         6130         2114A            2115A            2116B            DDP-416
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  MEMORY
    Memory cycle time (µs)              1.0          1.5           8           1.1           2.6             1.0            .860      1.65        0.775        2.0              2.0              1.6              0.96
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Memory word length (bits)           18           18            16          18            16              16             18        16          18           16               16               16               16
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Minimum memory size (words)         8K           4K            4K          4K            1K              4K             4K        4K          8K           4K               4K               8K               4K
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Memory increment size (words)       8K           4K            4K          4K            1K, 2K, 4K      4K             4K        4K          8K           4K               4K               8K               4K
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Maximum memory size (words)         32K          16K           16K         32K           32K             32K            16K       32K         32K          8K               8K               32K              16K
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Parity check (std., opt., no)       opt.         opt.          no          std.          no              opt.           std.      no          std.         opt.             opt.             opt.             opt.
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Memory protect (std., opt., no)     opt.         opt.          no          std.          no              std.           std.      std.        std.         no               opt.             opt.             opt.
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  CPU FEATURES
    Instruction word length (s)         18           18            16          16/32         16              16             16/32     16/32       16/32        16               16               16               16/32
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Number of accumulators (or          1 std.       1 std.        1           2             4               2              1         2           2            2                2                2                1
    general purpose registers that      1 opt.       1 opt.
    can be used as accumulators)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Number of hardware registers        1 std.       1 std.        6           8             10              6              5         9           4            7                7                7                4
    (not including index registers)     1 opt.       1 opt.
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Number of index registers           7 (auto.     7 (auto.      1 hardware  1 hardware    2 hardware      1 hardware     1 memory  1 hardware  3 hardware   none             none             none             none
    (indicate whether they are          index mem.   index mem.                1 memory      16 memory
    hardware, memory or other           reg.)        reg.)
    techniques)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    How many bits for operation code    4            4             5           4             5               5              6         4           5            4                4                4                6
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    How many bits for address modes     1            1             3           4             3               3              3         3           3            2                2                2                1
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Number of addressing modes          2            2             8           7             8               8              5         3-8         7            4                4                4                2
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    How many bits for address           13           13            8           8/15          8               8              7/14      9/15        8/15         10               10               10               9/14
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    In this machine one can directly
    address _________ words in          8,192        4,096         768         256           1,024           256            16,384    512         32,768       2,048            2.048            2,048            1,024
    _________ µs and indirectly         2.0          3.0           16.0        1.1           5.2             2.0            1.9       1.65        1.9          2.0              2.0              1.6              0.96
    address _________ words in          32K          16K           16K         32K           32K             32K            16K       32K         32K          8K               8K               32K              16K
    _________ µs                        3.0          4.5           24.0        3.3           7.8             3.0            1.9       3.3         2.9          4.0              4.0              3.2              1.92
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Indirect addressing                 Single-      Single-       Multi-      Multi-        Multi-          Multi-         Single-   Multi-      Multi-       Multi-           Multi-           Multi-           Multi-
    (multi-level, single-level, no)     level        level         level       level         level           level          level     level       level        level            level            level            level
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  ARITHMETIC OPERATIONS
    Store time for full word (µs)       2.0          3.0           16.0        2.2           5.5             2.0            1.9       3.3         1.9          4.0              4.0              3.2              1.92
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Add time for full word (µs)         2.0          3.0           16.0        2.2           5.9             2.0            1.9       3.3         1.9          4.0              4.0              3.2              1.92
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Fixed-point hardware mult/divide    opt.         opt.          no          std.          no              std.           opt.      std.        std.         no               opt.             opt.             no
    (std., opt., no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Multiply time hardware (µs)         3.0 to 11.0  4.5 to 16.5   --          7             --              6.0            6.5       18.15       4.5 to 8.3                    24.0             19.2
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Divide time hardware (µs)           3.0 to 12.0  4.5 to 18.0   --          9             --              7.0            12.5      18.975      7.9 to 11.4                   26.0             20.8
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Multiply time software (µs)         281 max.     421 max.      102         --            329.3 to 334.1  N/A                                               187              187              150              154.6
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Divide time software (µs)           352 max.     528 max.      178         --            424.8 to 519.2  N/A                                               387              387              310              220.8
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  I/O CAPABILITY
    Data path width (bits)              18           18            8/16        16            16              16             16        16          16           16               16               16               16
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Direct memory access (DMA)          std.         no            std.        opt.          std.            opt.           opt.      opt.        std.         no               opt.             opt.             opt.
    channel (std., opt., no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Maximum DMA word transfer rate      1 MHZ        --            125 KHZ     900 KHZ       312 KHZ         1 MHZ          1.1 MHZ   600 KHZ     1.26 MHZ     --               500 KHZ          625 KHZ          1 MHZ
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Number of external priority         1            1             3           16            16              8              1         7           none         8                8                16               2
    interrupt levels provided
    in basic system
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Maximum number of external          256          256           256         16            62              64             32        64          126          56               40               48               48
    interrupts
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Response time (µs) including        4.0          6.0           48.0        50.0          38.6            5.0            8.0       5.8         13.2         10.0             10.0             8.0              4.8
    time to save registers of
    interrupted program and
    initiate new program execution
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  OTHER FEATURES
    Power failure protect               opt.         opt.          opt.        std.          std.            std.           opt.      std.        std.         opt.             opt.             std.             std.
    (std., opt., no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Automatic restart after power       opt.         opt.          opt.        opt.          opt.            std.           opt.      no          opt.         opt.             opt.             opt.             opt.
    failure (std., opt., no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Real-time clock or internal timer   std.         opt.          opt.        opt.          opt.            opt.           opt.      opt.        opt.         opt.             opt.             opt.             opt.
    (std., opt., no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  SOFTWARE
    Assembler (1 pass, 2 pass, both)    2 pass       2 pass        2 pass      2 pass        2 pass          2 pass         1 pass    2 pass      both         2 pass 2         2 pass           2 pass           both
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Relocatable assembler (yes, no)     yes          yes           yes         yes           no              yes            yes       yes         yes          yes              yes              yes              no
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Minimum core size necessary to use  8K           4K            4K          4K            --              4K             4K        8K          8K           4K               4K               4K               --
    this relocatable assembler
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Macro assembler capability          yes          yes           no          yes           no              yes            no        no          yes          no               no               no               no
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Compilers available (specify        Fortran      Fortran       none        ASA Basic     none            none           Fortran   Fortran     ASA Basic    Algol, ASA       Algol, ASA       Algol, ASA       none
    explicitly, e.g., Fortran II,       IV           IV                        Fortran                                      IV        IV          Fortran      Basic Fortran    Basic Fortran    Basic Fortran
    IV, ASA Basic Fortran, etc.)                                                                                                                  Fortran IV
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Conversational compilers (e.g.,     FOCAL        none          none        none          none            none           CHAT      DOI         none         BASIC            BASIC            BASIC            none
    FOCAL, BASIC, CAL, etc.)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Real-time executive monitor         yes          yes           no          yes           no              no             no        no          yes          no               no               yes              no
    available (yes, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Disc operating system available     yes          yes           no          yes           no              no             no        yes         yes          no               yes              yes              yes
    (yes, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  BASIC MAINFRAME COSTS
    Basic system price with 4K words    N/A          $19,000       $11,900     $29,000       $ 7,600         $13,900        $12,800   $26,500     N/A          $ 9,950          $14,500          N/A              $15,700
    including power supplies
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Price of ASR-33 Teletype (if not    --           $   900       $ 1,900     $ 6,000       $ 1,400         $ 2,000        $ 1,200   $ 1,200     --           $ 2,000          $ 2,000          --               $ 1,200
    already included in Basic System                                           (ASR-35)
    Price)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Total system price, including       --           $19,900       $13,800     $35,000       $ 9,000         $15,900        $14,000   $27,700     --           $11,950          $16,500          --               $16,900
    ASR-33 Teletype and CPU                                                    (ASR-35)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Basic system price with 8K words    $35,000      $25,000       $17,900     $37,000       $10,885         $20,400        $18,600   $35,500     $46,000      $13,950          $19,500          $24,000          $23,700
    including adequate power supplies,
    enclosure, control panel
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Price of ASR-33 Teletype (if not    Included     $   900       $ 1,900     $ 6,000       $ 1,400         $ 2,000        $ 1,200   $ 1,200     $ 3,100      $ 2,000          $ 2,000          $ 2,000          $ 1,200
    already included in Basic System                                           (ASR-35)
    Price)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Total system price including        $35,000      $25,900       $19,800     $43,000       $12,285         $22,400        $19,800   $36,700     $49,100      $15,950          $21,500          $26,000          $24,900
    ASR-33 Teletype and CPU                                                    (ASR-35)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  PERIPHERALS AVAILABLE
    Magnetic tape available (yes, no)   yes          yes           yes         yes           yes             yes            yes       yes         yes          yes              yes              yes              yes
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Approximate price for               $22,000      $22,000       $ 5,700     $22,500       $12,000         $19,500        $12,000   $30,000     $35,200      $12,500          $15,500          $15,500          $23,355
    operational unit (including            to           to            to                                                                 to          to           to               to               to               to
    controller, computer options        $23,000      $23,000       $10,000                                                            $32,000     $67,200      $15,000          $21,500          $21,500          $35,430
    necessary, etc.)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Mass storage device available       yes          yes           yes         yes           yes             yes            yes       yes         yes          no               yes              yes              yes
    (yes, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Approximate price of operational    $ 9,750      $ 9,750       $ 6,500     $27,500       $ 6,500         $18,000        $15,000   $24,500     $20,200      --               $26,500          $26,500          $22,300
    unit (including controller,                                       to                        to              to                                   to                            to               to               to
    computer options necessary, etc.)                              $ 9,950                   $ 9,250         $45,000                              $54,700                       $31,500          $31,500          $36,000
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    High speed paper tape reader        yes          yes           yes         yes           yes             yes            yes       yes         yes          yes              yes              yes              yes
    (yes, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Speed (char/sec)                    300          300           300         350           300/150         300            300       300         300          300              300              300              300
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
                                        Included   Combination     $ 2,200     $ 4,500       $2,650/$2,150   $ 2,000        $ 2,500 Combination Combination    $ 2,100          $ 2,100          $ 2,100          $ 3,800
    Approximate price of operational unit            $ 4,800                                                                          $ 8,400     $10,100
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    High speed paper tape punch         yes          yes           yes         yes           yes             yes            yes       yes         yes          yes              yes              yes              yes
    (yes, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Speed (char/sec)                     50           50            60         120           63.3            120            120       120         60           120              120              120              110
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
                                        Included   Combination      $ 3,300    $ 5,100       $ 2,200         $ 4,000        $ 4,000 Combination Combination    $ 4,100          $ 4,100          $ 4,100          $ 4,500
    Approximate price of operational unit            $ 4,800                                                                          $ 8,400     $10,100
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

  NOTE: N/A = Not Announced--or Not Available

  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
                                                           Information                                                                                           Scientific   Scientific     Systems        Systems
                                                           Technology, Inc.                                                 Lockheed                             Control      Data           Engineering    Engineering
                                              Honeywell    ITI-4900          Interdata   Interdata   IBM       IBM          Electronics  Raytheon    Raytheon    Corp.        Systems        Laboratories   Laboratories
  MANUFACTURER/MODEL NUMBER                   DDP-516      (Model 20)        Model 3     Model 4     1130      1800         MAC-16       703         706         4700         Sigma 2        810A           810B
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  MEMORY
    Memory cycle time (µs)                       0.96         0.975/1.75        .980/1.5    .980/1.5    2.2/3.6   2/4          1            1.75        0.9         .920         .9             1.75           .750
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Memory word length (bits)                    16           16                16          16          16        16           16           16          16          16           16             16             16
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Minimum memory size (words)                  4K           4K                2K          2K          4K        4K           4K           4K          4K          4K           8K             4K             8K
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Memory increment size (words)                4K           4K                2K, 4K      2K, 4K      4K        4K           4K           4K          4K          4K           4K             4K             8K
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Maximum memory size (words)                  32K          32K               32K         32K         32K       32K          65K          32K         32K         65K          65K            32K            32K
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Parity check (std., opt., no)                opt.         opt.              opt.        opt.        std.      std.         opt.         no          opt.        opt.         std.           opt.           std.
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Memory protect (std., opt., no)              opt.         opt.              opt.        opt.        no        std.         opt.         no          opt.        opt.         opt.           opt.           opt.
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  CPU FEATURES
    Instruction word length(s)                   16/32        16/32             16/32       16/32       16/32     16/32        16           16          16          16/32        16             16             16
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Number of accumulators (or                   2            8                 16          16          2         2            1            1           1           3            2              2              2
    general purpose registers that
    can be used as accumulators)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Number of hardware registers                 5            16                18          33          7         7            6            6           6           10           6              2              2
    (not including index registers)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Number of index registers                    1            6                 15          15          3         3            4            1           1           1            2              1              2
    (indicate whether they are                   hardware     hardware                                  memory    hardware     memory       hardware    hardware    hardware     hardware       hardware       hardware
    hardware, memory or other
    techniques)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    How many bits for operation code             5            8                 8           8           5         5            4            4           4           4/9          4              4              4
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    How many bits for address modes              2            2                 2           2           2         2            3            1           1           3            4              2              2
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Number of addressing modes                   4            4                 3           3           3         3            8            2           2           5            16             4              4
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    How many bits for address                    9/14         6/16              6/16        6/16        9/16      9/16         9            11          11          9/16         8              10             10
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    In this machine one can directly
    address _________ words in                   1,024        32,768            32,768      32,768      32,768    32,768       512          32,768      32,768      32,768       1,024          1,024          1,024
    _________ µs and indirectly                  0.96         .975/1.75         0.98/1.5    0.98/1.5    2.2       2.0          2.0          3.5         1.8         .92          .9             1.75           .750
    address ________  words in                   32K          32K               --          --          32K       32K          65K          --          --          65K          65K            32K            32K
    _________ µs                                 1.92         1.95/3.5          --          --          2.2       2.0          3.0          --          --          1.84         1.8            3.5            1.5
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Indirect addressing                          Multi-       Multi-level       no          no          Single-   Single-      Multi-level  no          no          Single-      Single-        Multi-level    Multi-level
    (multi-level, single-level, no)              level                                                  level     level                                             level        level
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  ARITHMETIC OPERATIONS
    Store time for full word (µs)                1.92         1.95/3.5          6.0         6.0         4.64      4.25         2.0          3.5         1.8         1.84         2.2            3.5            1.50
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Add time for full word (µs)                  1.92         1.95/3.5          3.2         3.2         4.88      4.25         2.0          3.5         1.8         1.84         2.2            3.5            1.50
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Fixed-point hardware mult/divide             opt.         opt.              opt.        opt.        std.      std.         opt.         opt.        opt.        opt.         opt.           std.           std.
    (std., opt., no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Multiply time--hardware (µs)                 5.28         10                23          23          15.67     15.25        9            12.25-17.5  6.3 to 9.0  6.44         10.3           7              4.5
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Divide time--hardware (µs)                   10.00        25                38          38          46.36     42.75        12           24.0        9.0         6.90         10.8           10.5           8.25
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Multiply time--software (µs)                 154.6        50                900         900         --        --           150          147         75          --           103            --             --
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Divide time--software (µs)                   220.8        100               1,020       1,020       --        --           300          299.25      154         --           297            --             --
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  I/O CAPABILITY
    Data path width (bits)                       16           16                8           8           16        16           16           16          16          8/16         8              16             16
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Direct memory access (DMA)                   opt.         opt.              opt.        opt.        std.      std.         opt.         opt.        opt.        opt.         std.           opt.           opt.
    channel (std., opt., no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Maximum DMA word transfer rate               1 MHZ        1 MHZ             450 KHZ     450 KHZ     460 KHZ   500 KHZ      800 KHZ      571 KHZ     1.1 MHZ     1.1 MHZ      200 KHZ        572 KHZ        1.33 MHZ
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Number of external priority                  2            8                 2           2           6         12           4            1           1           2            2              3              3
    interrupt levels provided
    in basic system
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Maximum number of external                   48           256               255         255         96        384          64           16          16          256          132            96             96
    interrupts
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Response time (µs) including                 9.6          5.0               9.0-16.0    9.0-16.0    100.0     100.0        6.0          5.25        2.7         7.36         6.0            10.5           6.75
    time to save registers of
    interrupted program and
    initiate new program execution
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  OTHER FEATURES
    Power failure protect                        std.         opt.              opt.        opt.        no        opt.         opt.         opt.        opt.        std.         opt.           std.           std.
    (std., opt., no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Automatic restart after power                opt.         opt.              opt.        opt.        no        opt.         opt.         std.        std.        opt.         opt.           opt.           opt.
    failure (std., opt., no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Real time clock or internal timer            opt.         opt.              opt.        opt.        no        std.         opt.         opt.        opt.        opt.         opt.           opt.           opt.
    (std., opt., no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  SOFTWARE
    Assembler (1 pass, 2 pass, both)             both         1 pass            both        both      2 pass      2 pass      2 pass        both        both       2 pass       2 pass         2 pass          2 pass
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Relocatable assembler (yes, no)              yes          yes               yes         yes        yes        yes         yes           yes         yes         yes          yes            yes            yes
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Minimum core size necessary to use           N/A          4K                4K          4K         4K         4K          4K            8K          8K          4K           8K             8K             8K
    this relocatable assembler
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Macro assembler capability                   no           yes               no          no         yes        yes         yes           yes         yes         yes          yes            yes            yes
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Compilers available (specify                 Fortran IV  Fortran IV        none        none     ASA Basic     ASA Basic    ASA       Fortran IV   Fortran IV   ASA Basic   Fortran IV  Fortran IV      Fortran IV
    explicitly e.g., Fortran II, IV,                                                                 Extended      Extended  Standard      Fortran     ASA Basic    Fortran    ASA Basic
    ASA Basic Fortran, etc.)                                                                         Fortran       Fortran   Fortran IV   ASA Basic     Fortran    Fortran IV   Fortran
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Conversational compilers (e.g.,              Fortran IV   none             Fortran     Fortran      APL       none        none          none        none        none         none           none           none
    FOCAL, BASIC, CAL, etc.)                      BASIC
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Real-time executive monitor                  yes          yes               no          no         no         yes         no            yes         yes         yes          yes            no             yes
    available (yes, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Disc operating system available              yes          no                no          no         yes        yes         no            yes         yes         yes          yes            yes            yes
    (yes, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  BASIC MAINFRAME COSTS
    Basic system price with 4K words           $23,800      $ 9,950           $10,800     $13,800    $25,880    $47,300     $11,950       $15,000     $19,000     $14,800        N/A          $18,000          N/A
    including power supplies
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Price of ASR-33 Teletype (if not           $ 1,200      $ 2,500           $ 1,900     $ 1,900   Included    $ 2,930     Included      Included    Included    $ 1,700        --           Included         --
    already included in Basic System
    Price)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Total system price, including              $25,000      $12,450           $12,700     $15,700    $25,880    $50,230     $11,950       $15,000     $19,000     $16,500        --           $18,000          --
    ASR-33 Teletype and CPU
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Basic system price with 8K words           $31,800      $15,950           $17,700     $20,700    $34,030    $55,700     $15,900       $23,000     $24,600     $22,300      $34,000        $23,000        $30,000
    including adequate power supplies,
    enclosure, control panel
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Price of ASR-33 Teletype (if not           $ 1,200      $ 2,500           $ 1,900     $ 1,900   Included    $ 2,930     Included      Included    Included    $ 1,700      $ 7,000        Included       Included
    already included in Basic System                                                                                                                                         (ASR-35)
    Price)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Total system price including               $33,000      $18,450           $19,600     $22,600    $34,030    $58,630     $15,900       $23,000     $24,600     $24,000      $41,000        $23,000        $30,000
    ASR-33 Teletype and CPU                                                                                                                                                  (ASR-35)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  PERIPHERALS AVAILABLE
    Magnetic tape available (yes, no)            yes          yes               yes         yes        no         yes         yes           yes         yes         yes          yes            yes            yes
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Approximate price for                      $23,355      $18,000           $ 9,900     $ 9,900      --       $15,620       N/A         $10,500     $10,500     $24,000      $25,000        $24,000        $24,000
    operational unit (including                   to                                                                                         to          to
    controller, computer options               $35,430                                                                                    $28,000     $28,000
    necessary, etc.)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Mass storage device available                yes          N/A               yes         yes        yes        yes         no            yes         yes         yes          yes            yes            yes
    (yes, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Approximate price of operational           $22,300        --              $17,400     $17,400   Included    $13,500       --          $21,500     $21,500     $19,500      $26,000        $30,000        $30,000
    unit (including controller,                   to
    computer options necessary, etc.)          $36,000
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    High speed paper tape reader                 yes          yes               yes         yes        yes        no          yes           yes         yes         yes          yes            yes            yes
    (yes, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Speed (char/sec)                             300          300               300         300         60        --          300           300         300         300          300            300            300
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
                                               $ 3,800      $ 2,500           $ 2,500     $ 2,500    $ 1,720      --          N/A         $ 3,300     $ 3,000      $ 3,000    Combination     $ 4,000        $ 4,000
    Approximate price of operational unit                                                                                                                                    $12,000
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    High speed paper tape punch                  yes          yes               yes         yes        no         no          yes           yes         yes         yes          yes            yes            yes
    (yes, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Speed (char/sec)                             110           50                60          60        --         --           60           110         110         120          120            100            100
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
                                               $ 4,500      $ 3,000           $ 3,800     $ 3,800      --         --          N/A         $ 4,200     $ 4,000     $ 4,000    Combination      $ 4,000        $ 4,000
    Approximate price of operational unit                                                                                                                                    $12,000
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

  NOTE: N/A = Not Announced--or Not Available

  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
                                          Tempo                  Digital       Digital        Digital                                     Spear         Business
                                          Computers,             Equipment     Equipment      Equipment      General                    Computers,     Information     Computer       Data        General
                                          Inc.       Varian      Corp.         Corp.          Corp.          Automation     Motorola     Inc.          Technology     Automation    Technology  Automation     Varian
  MANUFACTURER/MODEL NUMBER               Tempo 1    620 i       LINC-8        PDP 8/1        PDP 8/L        SPC-12         MDP-1000    Micro Linc      480/482        PDC-808       DT-1600      SPC-8         520 i
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  MEMORY
    Memory cycle time (µs)                 0.9        1.8          1.5           1.5            1.6           2.0            2.16           1              3.0           8.0          8.0         2.0           1.5
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Memory word length (bits)              16        16/18          12            12             12             8              8            12               8             8            8           8             8
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Minimum memory size (words)             4K        4K            4K            4K             4K            4K             4K            4K              1K            4K           4K          4K            4K
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Memory increment size (words)           4K        4K            4K            4K             4K            4K             4K            4K          1K, 2K, 4K        4K           4K          4K            4K
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Maximum memory size (words)             65K      32K           32K           32K             8K           16K            16K           32K             65K           16K          16K          8K           32K
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Parity check (std., opt., no)           opt.     opt.          opt.          opt.           opt.          opt.            no           opt.            opt.          no           no          opt.          opt.
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Memory protect (std., opt., no)         opt.     opt.           no           std.           std.           no             no            no              no           no          opt.          no           std.
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  CPU FEATURES
    Instruction word length(s)             16/32     16/32          12           12/24          12/24        8,12,16          12            12             8/16         8/16         8/16        8,12,16        8/16
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Number of accumulators (or               2          2            2            1               1             4              6             1              1            1            1             2            7
    general purpose registers that
    can be used as accumulators)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Number of hardware registers             7          6           10            4               4             8              9            12              8            8            8             6            7
    (not including index registers)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Number of index registers            1 hardware  2 hardware  8 memory     8 memory       8 memory      3 hardware    3 hardware     16 memory          none         none         none      1 hardware   1 hardware
    (indicate whether they are
    hardware, memory or other
    techniques)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    How many bits for operation code         4          4         2,3,7           3              3              8              8             7              8            6            4            8,12          3
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    How many bits for address modes          3          3           3             1              1              3              3             5             none          2            2             3            3
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Number of addressing modes               8          4           6             2              2              5              6             4              1            4            2             4            5
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    How many bits for address               9/16       9/11   12, 10, 8, 4       8/15           8/13           12             12            12             8/16          8            8            12           15
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    In this machine one can directly
    address _________ words in              512      2,048        1,024          256            256          4,096          4,096         1,024            256          512          512          4,096        4,096
    _________ µs and indirectly             0.9        3.6          3.0          1.9            1.6           4.2            4.32          2.0             3.0          24.0         16.0          4.2          2.5
    address _________ words in              65K        32K          4K           32K            8K            4K             4K            1K              65K          16K          16K           4K           32K
    _________ µs                            1.8        5.4          4.5          3.0            3.2           6.3            10.8          3.0           23.25          40.0         32.0          6.3          5.25
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Indirect addressing                 Multi-level  Multi-level  Single-level  Single-level  Single-level  Single-level   Single-level  Single-level  Single-level   Multi-level  Multi-level  Single-level  Multi-level
    (multi-level, single-level, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  ARITHMETIC OPERATIONS
    Store time for full word (µs)           1.8        3.6         3.0           3.0            3.2           4.2            4.32          2.0            14.25        24.0          24.0         4.2           4.5
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Add time for full word (µs)             1.8        3.6         3.0           3.0            3.2           4.2            4.32          2.0            14.25        24.0          24.0         4.2           4.5
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Fixed-point hardware mult/divide        opt.       opt.      mult.-std.      opt.            no            no             no        mult.-std.         opt.          no           no           no            no
    (std., opt., no)                                             div.-opt.                                                               div.-no
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Multiply time--hardware (µs)             7          10          34           N/A             --            --             --            14             N/A           --           --           --            --
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Divide time--hardware (µs)               9         10-14        37           N/A             --            --             --            --             N/A           --           --           --            --
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Multiply time--software (µs)            --         200          --           360            360           N/A            N/A           300             N/A         1,100        1,200         400           N/A
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Divide time--software (µs)              --         200         460           460            460           N/A            N/A          1700             N/A         1,880        1,500         500           N/A
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  I/O CAPABILITY
    Data path width (bits)                  8/16      16/18         12            12             12           8/12            12            12              8            8            8          8/12          8/16
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Direct memory access (DMA)              opt.       opt.        std.          opt.           opt.          opt.           opt.          std.            std.          no           no          opt.          opt.
    channel (std., opt., no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Maximum DMA word transfer rate        800 KHZ    200 KHZ     666 KHZ        666 KHZ        625 KHZ      430 KHZ        430 KHZ        1 MHZ          250 KHZ         --           --        430 KHZ        660 KHZ
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Number of external priority              4         none         1              1              1             2              1             1              1             3            3            2             3
    interrupt levels provided
    in basic system
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Maximum number of external              256         64          1             64              64          256             64             1              1            64           32          256            11
    interrupts
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Response time (µs) including            3.6                    14.0          14.0            18.6         20.0           N/A            8.0           50.0          88.0         32.0         20.0          1.5
    time to save registers of
    interrupted program and
    initiate new program execution
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  OTHER FEATURES
    Power failure protect                   std.        opt.       opt.          opt.           opt.          opt.           opt.          std.            opt.         opt.         opt.         opt.          opt.
    (std., opt., no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Automatic restart after power           opt.     opt.          opt.          opt.           opt.          opt.           opt.          no              opt.         opt.         opt.         opt.          opt.
    failure (std., opt., no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Real-time clock or internal timer       opt.     opt.          opt.          opt.           opt.          std.           std.          opt.            opt.         opt.         opt.         std.          opt.
    (std., opt., no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  SOFTWARE
    Assembler (1 pass, 2 pass, both)       both    22 pass         both          both          both          1 pass        2 pass         2 pass          3 pass      2 pass        2 pass       1 pass        2 pass
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Relocatable assembler (yes, no)         yes      no            yes           yes            yes           yes            yes           no              no           no           yes          yes           yes
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Minimum core size necessary to use      4K       --            8K            8K             8K            4K             4K            --              --           --            4K          4K            4K
    this relocatable assembler
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Macro assembler capability              yes      no            yes           yes            yes           no             yes           no              no           no           no           no            no
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Compilers available (specify           ASA    Fortran II    Fortran II      Fortran II     Fortran II     none           none           none            ASA         none         none         none          none
    explicitly, e.g., Fortran II,          Basic                  Algol          Algol          Algol                                                     Basic
    IV, ASA Basic Fortran, etc.)          Fortran                                                                                                        Fortran
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Conversational compilers (e.g.,        none       none        BASIC         FOCAL          FOCAL          no             no            no              no           no           no           no            no
    FOCAL, BASIC, CAL, etc.)                                      FOCAL         BASIC          BASIC
                                                                  LAP-6
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Real-time executive monitor             no         no          no            no             no            yes            yes           yes             yes          no           no           yes           no
    available (yes, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Disc operating system available         no         no          yes           yes            yes           no             no            no              no           no           yes          no            no
    (yes, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  BASIC MAINFRAME COSTS
    Basic system price with 4K words      $15,000    $12,100     $38,500       $12,800        $ 8,500       $ 6,400        $ 8,500       $46,500[A]      $ 9,310      $ 6,600      $ 6,600      $ 6,400       $ 7,500
    including power supplies
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Price of ASR-33 Teletype (if not      Included   $ 1,800     Included      Included       Included      $ 1,100        $ 1,200       Included        Included     $ 1,500      $ 1,900      $ 1,100       $ 1,400
    already included in Basic System
    Price)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Total system price, including         $15,000    $13,900     $38,500       $12,800        $ 8,500       $ 7,500        $ 9,700       $46,500[A]      $ 9,310      $ 8,100      $ 8,500      $ 7,500       $ 8,900
    ASR-33 Teletype and CPU
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Basic system price with 8K words      $19,000    $18,500     $47,500       $16,300        $13,200       $ 9,600        $11,500       $56,500[A]      $11,250      $ 8,800      $ 8,800      $ 9,600       $10,000
    including adequate power supplies,
    enclosure, control panel
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Price of ASR-33 Teletype (if not      Included   $ 1,800     Included      Included       Included      $ 1,100        $ 1,200       Included        Included     $ 1,500      $ 1,900      $ 1,100       $ 1,400
    already included in Basic System
    Price)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Total system price including          $19,000    $20,300     $47,500       $16,300        $13,200       $10,700        $12,700       $56,500[E]      $11,250      $10,300      $10,700      $10,700       $11,400
    ASR-33 Teletype and CPU
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
  PERIPHERALS AVAILABLE
    Magnetic tape available (yes, no)       yes        yes         yes           yes            yes           yes            yes           yes             yes          yes          yes          yes           yes
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Approximate price for                 $12,000      N/A       $24,700       $24,700        $24,700       $11,000          N/A           N/A           $18,700      $ 5,700      $ 9,950      $ 9,800       $ 9,000
    operational unit (including                                                                                                                             to           to
    controller, computer options                                                                                                                         $22,500      $10,000
    necessary, etc.)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Mass storage device available           yes        yes         yes          yes             yes           yes            yes           yes             yes          yes          yes          yes           yes
    (yes, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Approximate price of operational        N/A        N/A       $ 6,000       $ 8,700        $ 8,700       $ 6,000          N/A           N/A           $ 7,390      $ 9,950      $10,000      $ 6,000         N/A
    unit (including controller,                                                   to             to            to                                                        to                        to
    computer options necessary, etc.)                                          $15,700        $15,700       $15,000                                                   $16,500                   $15,000
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    High speed paper tape reader            yes        yes         yes           yes            yes           yes            yes           yes             yes          yes          yes          yes           yes
    (yes, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Speed (char/sec)                        300        300         300          300             300           300            300           300             300          300          300          300           300
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Approximate price of operational unit   N/A        N/A       $ 2,500       $ 2,000        $ 2,000       $ 3,000          N/A           N/A           $ 2,300      $ 2,200      $ 3,300      $ 3,000       $ 2,900
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    High speed paper tape punch             yes        yes        yes           yes             yes           yes            yes           yes             yes          yes          yes          yes           yes
    (yes, no)
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
    Speed (char/sec)                      60/120      60/120       50           50               50           120            120           120              60           60           60         60/120         60
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
                                            N/A        N/A      $ 2,000        $ 2,000        $ 2,000       $ 4,000          N/A           N/A           $ 3,000      $ 3,300      $ 2,900      $ 3,600-      $ 3,300
    Approximate price of operational unit                                                                                                  $ 4,000
  -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

  NOTE: N/A = Not Announced--or Not Available

  [E] Price includes 2 mag tapes and crt with keyboard



Appendix B

BACKGROUND INFORMATION FOR CHAPTER 3, A REVIEW AND ANALYSIS OF
EXPENDITURES


At the November 1962 "Grossinger Conference on the Utilization of
Multiparameter Analyzers in Nuclear Physics" a paper by W. F. Miller
and H. W. Fulbright was presented in which data-analysis systems then
in use in AEC-sponsored laboratories in the fields of high-and
low-energy nuclear physics were reviewed. By that time many
applications of computers had already been made in the high-energy
field, while there were only a few examples of computer systems to be
found in low-energy laboratories, and those were rather simple.
Chapter 3 gives a similar review, but in this case the high-energy
field is excluded; the emphasis is concentrated on the economic
aspects of data-acquisition systems used in low-and medium-energy
physics. In the earlier paper, only AEC-sponsored laboratories were
covered, but in the present case some NSF-supported laboratories are
also included. Chapter 3 is a condensed version of a paper presented
by H. W. Fulbright at the Skytop "Conference on Computer Systems in
Experimental Nuclear Physics" in March 1969.

The first part of Chapter 3 presents a review and a simple analysis
of the expenditures for on-line computing in a total of 36 different
laboratories supported by the AEC and NSF. The second part presents a
discussion of trends visible in, or suggested by the analysis, along
with some other remarks about the support of on-line computing
facilities in nuclear-physics research laboratories.

Most of the information was supplied by the AEC. It was requested by
Paul W. McDaniel in letters sent in December 1968. Information was
received from about 90 percent of those from whom it was requested.
It was then forwarded to the author C. V. Smith, arriving in the
first two weeks of February 1969. The NSF found that certain
administrative regulations made the sending out of a questionnaire a
complicated procedure, so a different approach had to be adopted in
their case. Letters requesting the information were sent by the
reviewer himself directly to laboratory directors, the appropriate
names and addresses having been kindly supplied by William Rodney of
the NSF. Here the response was less complete. Most of the returns
arrived by February 21, 1969.

A large amount of information was available for analysis. In many
cases the laboratory involved had done a thorough job, and the
numbers presented in those cases were especially valuable in
providing a basis for estimating expenses for various items omitted
in less complete reports from other laboratories, particularly in the
case of manpower. In some ways, the information necessarily remained
incomplete because no practical means of obtaining it occurred to the
reviewer; the organization of the material in the analysis reflects
this fact.

  Institutions Reporting Systems
  ------------------------------------------------------------
  Place                                      Number of Systems
  ---------------------------------------    -----------------
  Brookhaven National Laboratory                    7
  University of California at Los Angeles           1
  University of Kansas                              1
  Lawrence Radiation Laboratory                     8
  University of Maryland                            1
  University of Minnesota                           1
  Oak Ridge National Laboratory                     6
  University of Texas                               1
  Texas A & M                                       1
  Yale                                              2
  University of Wisconsin                           1
  University of Colorado                            1
  Argonne National Laboratory                       2
  Columbia University                               3
  University of Washington                          1
  University of Pennsylvania                        1
  University of Iowa                                1
  Ohio State University                             1
  University of Rochester                           1
  Michigan State University                         1
  Stanford University                               1
  Rutgers-Bell Labs.                                2



Transcriber's Note

On page 69, item 6. was written as 5. in the original.

In this text version, the caret character has been used to represent
exponents, e.g. 10^6. _Italic text_ has been enclosed in underscores.





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